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MODEL 1000
S/N 1301 and Above
Revisions 3.0, 3.1 and 3.2
Manual No. TM1000D.2
SYNTHESIZER
TECHNICAL MANUAL
SECOND EDITION
By STANLEY jUNGLEIB
Wine Country Productions. Inc.
1572 Park Crest Court, Suite #505
San Jose, California 95118 USA
Phone: (408) 265-2008 FAX (408) 266-6591
SEQUENTIAL Product Speciafists Since 1987
I
PROPHET-5 SYNTHESIZER
TECHNICAL MANUAL
By Stanley Jungleib
Artwork: Denis Simard
Greg Armbruster
Second Edition
For Revisions 3.0, 3.1 and 3.2
Manual No. TM1000D.2
Issued: October, 1981
Copyright0i981 by
SEQUENTIAL CIRCUITS, INC.
All rights reserved. Printed in USA.
The contents of this manual are the property
of SCI and are not to be copied or reproduced
without our prior written permission.
D.2
' 1 ^ i
About This Manual and Servicing The Prophet
The Prophet is a sophisticated instrument and SCI issues its technical manual for use by qualified
technicians only. Of course the manual will be read by Prophet owners and others interested in
synthesizer design. And we realize it will also be used by some to develop modifications for the
instrument. While we support this innovative attitude in spirit, we cannot support it financially:
Modifications or unauthorized service void the Prophet's warranty. They also invariably extend service
time (thus, cost) if factory repair is required. Familiarize yourself thoroughly with this manual before
attempting any work on the Prophet. This will at least help you judge whether you should be working
on it at all. If in doubt, please contact our Service Department.
This edition of the Technical Manual (TM1000D) documents Prophet-5s with serial numbers 1301 and
above. Although great care was taken to ensure the changes would be transparent to players,
technicians will find "Rev 3" quite a different instrument from its predecessors. Rev 2 (S/N 184-1299, see
TM1000C) was a mere refinement of Rev 1 (S/N 1-182). Rev 3, however, uses new voltage-controlled ICs
in the analog synthesizer and, in the microcomputer, a vastly different ADC, DAC and control voltage
distribution scheme. Although the main purpose of the revision was to remove production limitations
caused by inconsistent supply and quality of the previous synth *'chip set/' the hardware redesign
encouraged the implementation of more sophisticated editing, tuning and maintenance software while
improving servicabiiity; the number of voice trimmers being reduced from 80 to 45.
The manual is organized as follows:
SECTION 1, MECHANICAL provides a physical introduction and directions for
disassembling/assembling the Prophet.
SECTION 2, THEORY explains general function and circuit operation, referring to block diagrams and to
the schematics for hardware details.
SECTION 3, DOCUMENTS contains schematics and pictorials identifying all components.
SECTION 4, SERVICE contains procedures for routine tests and trims.
SECTION 5, PARTS cross-references component designators to SCI stock numbers.
SECTION 6, GLOSSARY decodes abbreviations appearing on SCI documentation.
SECTION 7, APPENDIX contains selected data sheets.
Your response to the questionnaire on the next page will help us monitor our publication's usefulness
About The Second Edition
In addition, to the original revision 3.0 data (with a few corrections), the following
material covering later refinements of the instrument has been added. The revisions
occured chiefly in the microcomputer's memory configuration, added PITCH and MOD
CV inputs, and in the addition of a serial interface for communication with the Model
1005 Polyphonic Sequencer or Model 1001 Remote Keyboard.
SECTION if THEORY discusses the hardware changes comprising revisions 3.1 and 3.2.
SECTION 9, PROGRAMMING covers use of the serial interface.
m
SECTION 10, DOCUMENTS contains schematics and pictorials for revisions 3.1 and 3.2.
SECTION 11, SERVICE includes instructions for updating a 3.0 or 3.1 instrument to
level 3.2, for using the diagnostic memory tests, and for an added adjustment on
PCB 3.
SECTION 12, PARTS lists SCI stock numbers for 3.1 and 3.2-Ievel assemblies.
D.2
i
■ J
Table of Contents
I
SECTION 1 MECHANICAL
1-0 GENERAL 1-1
1-1 PRECAUTIONS 1-1
1-2 SERVICE POSITION 1-1
1-3 PCB 4 VOICE BOARD 1-3
1-4 PCB 3 COMPUTER BOARD 1-4
1-5 PCB 1/2 CONTROL PANELS 1-5
1-6 KEYBOARD 1-6
SECTION 2 THEORY
2-0 GENERAL 2-1
2-1 SYNTHESIZER BACKGROUND 2-1
2-2 THE PROPHET 2-4
2-3 ANALOG SYNTHESIZER DESCRIPTION 2-7
2-4 OSCILLATOR A, B AND LFO 2-8
2-5 MIXER AND AMOUNT VCAS 2-9
2-6 FILTER 2-9
2-7 ENVELOPE GENERATORS 2-9
2-8 AUDIO OUTPUT 2-10
2-9 MICROCOMPUTER SYSTEM DESCRIPTION 2-10
2-10 MICROPROCESSOR, MEMORY, AND I/O INTERFACE 2-12
2-11 CONTROL MATRICES 2-15
2-12 ADC, DAC, AND CV OUTPUTS 2-16
2-13 TUNE AND A-440 2-19
2-14 SEQUENCER INTERFACE 2-20
2-15 CASSETTE INTERFACE 2-21
SECTIONS DOCUMENTS
3-0 DOCUMENT LIST 3-1
3-1 DOCUMENT NOTES 3-1
SECTION 4 SERVICE
4-0 GENERAL 4-1
4-1 OSCILLATOR A TEST 4-3
4-2 OSCILLATOR B TEST 4-4
4-3 MIXER AND NOISE TEST 4-5
4-4 UNISON AND GLIDE TEST 4-5
4-5 FILTER TEST 4-6
4-6 AMPLIFIER TEST 4-6
4-7 LFO AND WHEEL-MOD TEST 4-7
4-8 POLY-MOD TEST 4-8
4-9 FINAL TEST 4-9
4-10 POWER SUPPLY TRIM 4-10
4-11 PITCH WHEEL TRIM 4-10
4-12 MASTER SUMMER OFFSET TRIM 4-10
4-13 WHEEL-MOD LFO VGA BALANCE 4-10
4-14 DAC GAIN, ADC GAIN, SEQ INTERFACE TRIM 4-11
4-15 WHEEL-MOD NOISE VGA BALANCE 4-11
4-16 VCO SCALE TRIM 4-12
4-17 POLY-MOD FILTER ENVELOPE VGA BALANCE 4-13
4-18 POLY-MOD OSCILLATOR B VGA BALANCE 4-13
4-19 FILTER ENVELOPE AMOUNT VGA BALANCE 4-14
4-20 FILTER TUNING 4-14
4-21 FINAL VCA BALANCE 4-16
4-22 VOICE VOLUME 4-16
SECTION 5
PARTS
5-0
5-1
5-2
5-3
5-4
5-5
■
5-6
SECTION 6
GLOSSARY
SECTION 7
APPENDIX
CHASSIS 5-1
PCB 1 s-^
PCB 2 5.1
PCB 3 ...........5-2
PCB 4 5.4
PCS 5 '.'.'.'.'.'.'.'.'.'.'.'.'.'.'.'.'.'.'.5-8
BILL OF MATERIALS (TOTAL ITEMS) 5-9
SECTION 8
CA3280 Dual Operational Transconductance Amplifier
CEM 3310 Voltage Controlled Envelope Generator
CEM 3320 Voltage Controlled Filter
CEM 3340/3345 Voltage Controlled Oscillator
THEORY
8-0 INTRODUCTION
8-1 REVISION 3.1 COMPUTER and POWER SUPPLY
8-2 REVISION 3.2 COMPUTER and USART
8-3 REVISION 3.2 ANALOG and POWER SUPPLY
8-1
8-1
8-2
8-^
SECTION 9 PROGRAMMING
9-0 INTRODUCTION
9-1 Data Format
9-2 Error Checking
9-3 Status Bytes
9-«f STATUS 0: SEND KEYBOARD and PROGRAM
9-5 STATUS 1: ACK, RECEIVE KEYBOARD and PROGRAM
9-6 STATUS 2: TRANSPOSE ON
9-7 STATUS 3: SAVE TO TAPE
9-8 STATUS U: LOAD FROM TAPE
9-9 STATUS 5: CLEAR TRANSPOSE
9-10 STATUS 6: INITIALIZE SEQ LOWER PROGRAM
9^11 STATUS 9: DISABLE TUNE
9-12 STATUS A: ENABLE TUNE
9-13 STATUS B: RECEIVE PROGRAM CHANGE
9-1^* STATUS C: SYSTEM CONNECT
9-15 STATUS E: RECEIVE SHORT KEYBOARD DATA
9-1
9-1
9-2
9-2
9-3
9-3
9-5
9-5
9-6
9-6
9-6
9-6
9-6
9-6
SECTION 10
DOCUMENTS
10-0 DOCUMENT LIST
10-1
SECTION 11
SERVICE
1 1-0 INTRODUCTION
11-1 REVISION 3.2 RETROFIT KIT INSTRUCTIONS
11-2 REVISION 3.0 MEMORY TEST
11-3 REVISION 3.1 MEMORY TEST
ll-'f REVISION 3.2 MEMORY TEST
11-5 WHEEL-MOD BALANCE TRIM
11-1
11-1
11-5
11-6
SECTION 12 PARTS
REVISION 3.2 COMPONENTS
' 1
SECTION 1
MECHANICAL
1-0 GENERAL
This section shows how to remove the Prophet's main assemblies. Not all of the procedures given here
should be necessary at any one time. For some service situations you will only need to separate the top
and bottom panel assemblies and arrange them as shown in Figure 1-0. This configuration, discussed in
paragraph 1-2, allows access to ail trimmers on PCB 4 and most trimmers on RGB 3. However, for some
RGB 3 trims you will have to swing-out or completely remove PCB 4, as discussed in paragraph 1-3.
1-1 PRECAUTIONS
Observe the following precautions when working on the Prophet:
SWITGH POWER OFF AND GHEGK 115/230V SWITGH ON BAGK PANEL BEFORE GONNECTING
PROPHET TO ROWER OUTLET OR AMPLIFIER.
NEVER TOGGLE 115/230V SWITGH WITH POWER ON,
TRIMMING, OF GOUR5E, MUST BE PERFORMED WITH ROWER ON. SO AVOID THE POWER SUPPLY
PRIMARY GIRGUITRY, WHIGH GONDUGTS LETHAL VOLTAGE.
SWITGH POWER OFF BEFORE DISCONNECTING OR CONNECTING ANY CIRCUITRY, OR
REMOVING OR INSTALLING RGBs.
IMPORTANT! WHENEVER THE AUDIO GABLE IS DISCONNECTED, RGB 3 MUST BE GROUNDED TO
THE BACK RACK PANEL.
DO NOT BEND OR STRAIN THE RGBs, OTHERWISE MAY CAUSE TINY BREAKS IN THE PRINTED-
CIRCUIT TRACES WHICH WILL BE EXTREMELY DIFFICULT TO FIND.
TO REPLACE SOLDERED COMPONENTS SWITCH POWER OFF, REMOVE THE PCB COMPLETELY
FROM THE INSTRUMENT AND DESOLDER FROM BOTH SIDES. USE A VACUUM SYRINGE OR DIP
DESOLDERER. KEEP VACUUM SYRINGES CLEAN TO PREVENT THEM FROM SPRAYING MOLTEN
SOLDER. DON'T OVERHEAT THE PADS. WORK CAREFULLY!
1-2 SERVICE POSITION
TO PREVENT DAMAGE TO THE TOP PANEL, KEYBOARD, OR WOODWORK, USE A CARPETTED OR
SIMILARLY-COVERED WORK SURFACE WHEN OPENING THE BOX.
To5et up the Prophet for service first switch power off, unplug power cord, and turn instrument over to
expose bottom panel. Remove two large screws near front feet. Remove eleven screws around
perimeter of bottom panel.
Holding top and bottom panel assemblies together, turn the Prophet right-side-up again. Remove four
screws along top edge of back panel. Slowly slide the top panel assembly forward— about nine inches—
so when raised the control pane! will clear the large power supply capacitors.
1-1
TOP
PANEL
ASSEMBLY
Z-80
CPU
NON-VOLATILE
PROGRAM RAM
EPROM
SCRATCHPAD
RAM
BOTTOM
PANEL
ASSEMBLY
MEMORY AND
I/O INTERFACE
PCB3
COMPUTER
OSCILLATOR AND
FILTER CV
DEMULTIPLEXER
SAMPLE/HOLDS
PCB4
VOICES
VOICE 1
VOICE 2
VOICE 3
VOICE 4
VOICE 5
FINAL
VCAs
LATCHES
COMMON AND
PATCH CV
DEMU^riPLEXER
SAMPLE/HOLDS
P303/
VOICE
POWER
CABLE
W2
PCB 3/4
INTERCONNECT
ENVELOPE
GENERATORS
POLY-MOD/
FILTER
ENVELOPE
VCAs
3 AUDIO
OUTPUT
POLY-MOD
OSCB
VCAs
MIXER
P402/
AUDIO
OUTPUT
CABLE
Figure 1-0
SERVICE POSITION
Raise the top panel assembly to service position shown. For best stability both top panel side back edges
should rest on the bottom panel. Actually, the top panel upper edge rests on the back panel cable. This
is normal; but a small (half-inch) prop may be added to improve stability.
The instrument can operate normally in this position. Of course its operating temperature will be far
below normal. This may slightly affect adjustments or the performance of certain ICs.
I
REMEMBER THAT IN SERVICE POSITION THE TOP PANEL ASSEMBLY BALANCES ON ITS REAR EDGES.
DONT UPSET THIS BALANCE BY PUSHING TOO HARD WHEN PROBING OR TRIMMING.
When reassembling the Prophet, turn instrument over and first start two large screws near front feet.
Then start bottom and back panel screws to obtain overall alignment before tightening all screws.
1-3 PCB 4 VOICE BOARD
PCB 4 may be swung-out and operated under power. For this set-up, switch power off, remove screws
identified in Figure 1-0 in the order suggested, and position board on insulation as shown in Figure 1-1.
^ -^^jv.^^^^^
INSULATION
COMMON
ANALOG
Figure 1-1
PCB 4 SWINCOUT
TO PREVENT.GROUND LOOPS, PCB 3 IS GROUNDED ONLY THROUGHTHE AUDIO CABLE TO THE
BACK PANEL. THEREFORE, WHENEVER THE AUDIO CABLE iS DISCONNECTED, PCB 3 MUST BE TIED
TO THE BACK PANEL
CAREFUL! DONT ALLOW PCB 4 TO SHORT AGAINST STANDOFFS FROM PCB 3 OR AGAINST THE
BOTTOM PANEL.
To remove W2, completely switch power off and disconnect voice power cable at P303 on PCB 3 (see
Figure 1-0). Also remove PCB 3/4 interconnect at P401 on PCB4, with a gentle "see-saw" motion. Detach
audio output cable from P402.
When reconnecting voice power and audio output cables, be sure tabs interlock. Also be sure the PCB
3/4 interconnect is correctly mated and firmly seated at P304 and P401.
•^^-.•^ ^^. ^
1-3
L ri
1-4 PCB 3 COMPUTER BOARD
PCB 3 is held by the screws identified in Figure 1-2, and by two direct connectors to PCB 2, behind it. To
remove PCB 3 first remove PCB 4. Disconnect back panel cable from P302 and wheel cable from P301^
remove screws, and pull while rocking the board to minimize stress.
P301/
WHEEL
CABLE 5
PANEL
CABLE
Figure 1-2
PCB 3 MOUNTING
When replacing be sure all connector pins are correctly mated with PCB 2 before fastening screws.
Alignment is insured by machine screw holes with their standoffs. Remember to reconnect the wheel
cable, too, before replacing PCB 4. When reconnecting wheel and back-panel cables, be sure tabs
interlock.
1-4
1-5 PCB 1/2 CONTROL PANELS
Once PCB 3 and PCB 4 have been removed, control pane! removal involves pulling off all knobs,
unscrewing all potentiometer mounting nuts — using a half-inch nutdriver — and removing screws
identified in Figure 1-3.
J201/W1
KEYBOARD
CABLE
PCB 2
LEFT
CONTROL
PANEL
W201
PCB 1/2
INTERCONNECT
FCB1
RIGHT
CONTROL
PANEL
Figure 1-3
PCB 1/2 MOUNTING
When replacing, check keyboard cable, that ail pots fit correctly through the front panel, and that
switches operate freely before tightening pot nuts.
v;
^f'
1-5
1-6 KEYBOARD
After removing PCB 3 and PCB 4, turn the top panel assembly over and disconnect keyboard cable at
j201 (see Figure 1-3).
Figure 1-4 details keyboard mounting. At both ends, remove keybed supports by first removing keybed
screws then rear keyboard mounting screws. Remove front keyboard mounting screws. The entire
keyboard will slide out of the case — and back in — as shown in Figure 1-5.
CAREFUL! DURING THIS OPERATION THE J-WIRES FOR THE LOWEST AND HIGHEST KEYS ARE
VULNERABLE TO DAMAGE FROM COLLISION WITH THE KEYBOARD MOUNTING BRACKETS.
WHEN REPLACING CHECK J-WIRES AT EACH END OF KEYBOARD FOR CONTACT WITH BUS BAR.
Also, remember to attach the wheel ground lug.
PITCH
WHEEL
DETENT
SHAFT
SLOT
R1
PITCH
WHEEL
R2
MOD
WHEEL
FRONT
KEYBOARD
MOUNTING
SCREW
J-WIRES
SET
SCREW
BUS
BAR
WHEEL
GROUND
LUG
REAR
KEYBOARD
MOUNTING
SCREW
KEYBED
SCREW KEYBED
SUPPORT
KEYBOARD
MOUNTING
BRACKET
Figure 1-4
KEYBOARD MOUNTING
1-6
Figure 1-5
KEYBOARD REMOVAL
1 -7/1 -8
SECTION 2
THEORY
2-0 GENERAL
This section explains the Prophet's theory of operation. First a general description relates the Prophet to
the basic analog synthesizer and introduces the concepts central to the Prophet's advances over
conventional performance instruments; programmability and polyphony. Then the analog synth and
microcomputer functions are covered and their sub-circuits detailed. Throughout it is assumed the
reader is already familiar with Prophet-5 operation (see Operation Manual CM1000B).
2-1 SYNTHESIZER BACKGROUND
The synthesizer is a new instrument but the urge to set technology in search of music is quite old.
Consider the pipe organ; of traditional instruments, most like the synthesizer. The organ achieved its
broad dynamic, pitch and timbral ranges through intricate mechanical arrays; for generating steady
wind, transferring key action to pneumatic valves for each note, activating ranks of pipes, and to couple
pedalboards and keyboards. Later, the bellows tremolo and pedal-operated swell shutters were added
for dynamic and timbral expression. As the organ expanded into larger halls pneumatic and hydraulic
devices were developed to Isolate the keyboard from the force required to key more pipes at higher
wind pressure. With the advent of electricity the keyboard and drawknobs, formerly levers, became
switches. Elaborate relay banks now drove solenoid valves for each pipe. More recently, electronic
organs— in many variations— have relied on motor-driven tone generators or switch/relay banks for
oscillator frequency division or waveform addition or shaping. Another influential technology, the tape
recorder captured natural, instrumental, and electronic sounds for new uses and stimulated the idea of
composing music not performable "in real time" on conventional Instruments. A few keyboard
instruments have been directly based on tape mechanisms.
Now, what is a synthesizer? It can be distinguished from the organ or tape recorder by reliance on
electronic rather than mechanical devices to generate and modify sound. Except for performer's
controls a synth need have no moving parts. (Even this exception may one day disappear.) Thus it is far
more flexible and controllable than an organ. In contrast to organ or tape technology, voltage control
(VC) allows the immediate and precise adjustment of the basic parameters of an audio stage such as
oscillator (VCO) or filter (VCF) frequency, or amplifier (VGA) gain, by a signal from another VCO, an
envelope generator (ENV GEN), keyboard (KBD) or sequencer (SEQ). Most music is analyzable into
elements replicable by a few VC-modules. For example, if a synth imitates a drum or piano it is not by
being a (mechanical) percussion instrument, but by simulating the dynamic envelope accompanying
percussive sounds with a VGA under control of an ENV GEN.
2-1
' h
TO
ADDITIONAL
VCOs
▲
TO
ADDITIONAL
ENV GENs
▲
ADDITIONAL
HARMONICS
<AfW
VCO B
INIT FREQ
KEYBOARD
1760 Hz
ENV GEN
® © (D ®
880 Hz
ENV GEN
® ® © ®
U
#
¥
MIXER
¥
440 Hz
"OBOE"
Figure 2-0
MONOPHONIC ADDITIVE SYNTHESIS
2-2
440 Hz
A
KBD CV
w, 440 Hz
^ "OBOE"
ENV GEN
® ® (D ®
ENV GEN
® ® © eg)
GATE/TRIG
Figure 2-1
MONOPHONIC SUBTRACTIVE SYNTHESIS
Besides a dynamic envelope a musical voice usually has a pitch and timbre which consists of a
fundamental and a number of harmonic frequencies— all of varying relative strengths. Pitch and timbre
synthesis raises a distinction between two techniques, diagrammed in Figures 2-0 and 2-1. The first
technique, additive synthesis, might create a timbre by summing the output of several sine-wave VCOs
for the fundamental and each harmonic. In contrast, subtractlve synthesis can start with one sawtooth-
wave VCO generating the fundamental with extensive harmonics, then obtain the desired timbre by
subtracting unwanted harmonics with a low-pass VCF.
The additive and subtractive techniques have encouraged the development of two types of instruments,
roughly, "studio" and "performance." Actually most organs use additive synthesis, but since with a
synth one can individually control the level of each harmonic over time additive synthesis may be
potentially more accurate for synthesizing a particular sound. Whether additive or subtractive, studio
synths may be configured from dozens of modules interconnected by patch cords. The modules have
knobs to establish the initial settings of VC-parameters such as initial frequency (FREQ), pulse width
(PW), and resonance (RES). But the flexibility and complexity of modular synths has discouraged their
live use on stage because significant sound changes often require repatching modules and precisely
checking knobs. Favorite, complex sounds take a long-time to create, and almost as long to recreate on a
modular synth. So these monophonic (one-voice) synths instead feed multi-track recorders on which
polyphonic interpretations or compositions are actually orchestrated.
A comparison of the number of modules and interconnections depicted In Figures 2-0 and 2-1 shows
why the subtractive configuration has become the popular technique for performance synths.
Subtractive synths may be smaller, so, more portable. Their patches will not be as elaborate, so, easier to
change. Originally, performance synths were monophonic. Or they exploited organ technology so
more than one note could be played at a time. "Preset" switches that select fixed patches supplanted
many modular controls. Though one could certainly change sounds quickly by using them, many
players have found preset synths unsatisfactory because they eliminate an essential part of synth
musicianship— control of the sound itself. Some manufacturers have offered partially-programmable
instruments. But before the Prophet appeared it was not possible for a keyboardist to instantly select his
or her own customized synth sounds and play them polyphonically.
2-3
2-2 THE PROPHET
The Prophet is a subtractive, analog synthesizer suitable for performance or studio use. It provides
instantaneous patch repeatability and polyphonic capability without the limitations of organ technology
or fixed presets. The term "digital-analog hybrid" is often used to describe the Prophet. It means the
digital computer controls the analog audio sources and modifiers. The computer itself generates no
sound (except for the A-440 reference).
Figure 2-2 diagrams the Prophet at the most general level. Instead of controlling the synth directly, the
keyboard and most controls are processed through a microcomputer system. The system provides a way
to store all of the switch and knob settings which form a patch, and solves the problem of generating
five sets of oscillator (OSC) and filter (FILT) CVs and GATEs from a single keyboard. The Common Analog
circuitry mixes the few non-processed controls with processed signals for the voices. Although only one
voice is depicted on the control panel, the black knobs and switches patch the five voices identically.
This makes the voices homophonous— they sound alike — with pitch differences corresponding to (at
most) five simultaneously-held keys.
DIGITAL
ANALOG
/
7\
CONTROL PANEL/
KEYBOARD
;
7
MICROCOMPUTER
SYSTEM
COMMON
ANALOG
^
\^ li
7
5 -VOICE
SYNTH
Figure 2-2
PROPHET GENERAL BLOCK DIAGRAM
Figure 2-3 shows the principle funaions of the four main blocks. Beginning with AUDIO OUT, the voice
outputs are combined and overall volume set by the VOL VCA controlled directly from the control
panel. Each voice is a complete synthesizer with two VCOs, a MIXER, VCF, FINAL VCA, and two ENV
GENs. Each of the ten VCOs has its own FREQ CV, which allows the computer to individually fine-tune
them and allows the voices to follow separate keys. Each voice receives its own GATE, which triggers the
two envelope generators with each keystroke.
All switch commands and most CVs are generated by the computer. Non-processed CVs include
MASTER TUNE, PITCH-bend, and WHEEL-MODulation which are mixed in the Common Analog
circuitry. The Common Analog circuitry also requires a few switch commands.
The microcomputer performs the task of voice assignment. It decides which held keys sound which
voices through the OSC and FILT CVs and GATEs. Voice 1 is assigned to the first key hit. Voice 2 to the
second key, and so on. After the five initial assignments the system is "last note priority." The earliest-
used voice is reassigned to each new note played. Repeated notes key the same voice. For example,
holding C, D, E, F, and G, sustains Voices 1, 2, 3, A, 5, respectively. Adding A "steals" Voice 1 from the
C-key, whose pitch disappears even though the key may still be held.
2-4
Figure 2-3
PROPHET FUNCTIONAL BLOCK DIAGRAM
RI04
MTUN
■^^^ TBia/2a
7
U370
-TUNE
PiTCH
i/f2 P30!
D3fS
-I5V
t/JTC?
«L/£?£"
GLIDE CV O'iOV^n ^ ajna
.620 J CM
UNI CV 0-5/
WHEEL- MOD
U37S
PINK NOISE SOURCE
NSE SRC AMT VCA
vOsar
U376
WHEEL-MOO SOURCE MIX Q-IO^
U377
3340 Jl
^-^ wv
COMMON ANALOG
VOICE
(VOiCES e-5 ARE SfMiLAR)
U427
GLIDE OUT 0'5V
F30f Jf2
^ Ji2 P30i
LFO SRC AMT VCA
lFOA
i-DETAIL A
TYPICAL CVS/H'
FROM .Vdac
£WC f
CV
WHITE NOISE SOURCE
NOISE CV
-> TO OTHER \/OlCE FfL TERS
MIX NSE
VCA
MTUN/P9N0
U379
U371
U410
OSC lA 5/H 0~K>\/
U454
A SUM CV
OSC I A
PW A SUM
OSC A PW
U379
WMOD PW A
lOSCBKBD
JJ373
TL08Z.
U37I
+'?^ U37I
10
05C B LQ
U369
W-MOQ
DSC B PW
IWMOOPWa
U369
U369
U367
FILT
10
FILT CTF CV Q-i^
^iuf KBD
JG
FILT CV IN
33/0
^ 33S0
iJ*3
-DETAIL B
■DETAIL C
TYRfCAL Bf-POLAR
SW/TCH'
+15V
'^
PROGRAM
LATCH
FROM _Vda c
2N4250
^.^o:?
2-6
Figure 2-4
ANALOG SYNTH ABSTRACT SCHEMATIC
Vdd
1 4016
C Vfi£
-.6V
PC83 PCB4
MSUM
U409
^^ ^7 OSCIBS/H J-£V
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In UNISON (monophonic) mode a UNISON CV derived from the lowest note played on the keyboard
becomes the main pitch controi for all voices through the Common Analog circuitry. The five GATEs
occur simultaneously, but the envelope generators only re-trigger if no keys are held.
The microcomputer system itself consists of the microprocessor or CPU, memory (MEM), and
input/output (I/O) Interface. The CPU executes the program permanently residing in the read-only
memory (EPROM). This program determines how the various input devices— keyboards, switches, and
knobs— are "read", and how "data" generated by them is "processed" to control the synthesizer. The
Scratchpad RAM is the CPU's work area. It holds data representing the current status of the keyboard
and all controls. Control status depends on the operational mode. In MANUAL mode the control data
corresponds to the current settings of the black, programmable knobs and switches. If desired this data
can be recorded from Scratchpad to the Non-Volatile Memory (NV RAM). Then, in PRESET mode,
selecting recorded programs moves them from NV to Scratchpad, reprogramming the synthesizer for
that sound. The EDIT feature allows one to alter individual control settings in Scratchpad, which can
then be recorded to supplement or replace the original program in NV RAM.
The remainder of this section discusses the Prophet's actual analog and microcomputer circuitry. Each
sub-circuit is described functionally in relation to its block diagram. Principal !Cs and any uncommon
designs are explained. However the function of common linear, TTL, and MOS ICs is not covered
because anyone contemplating technical work on the Prophet must already be familiar with, for
example, combinational logic and op amp circuits.
2-3 ANALOG SYNTHESIZER DESCRIPTION
The definitions of the various CV and switch commands in the analog synthesizer must be clear before
the Voice and Common Analog sub-circuits can be discussed. Referring to Figure 2-4, the Common
Analog circuitry includes the master summers (MSUMs), Glide, and WHEEL-MOD circuits. The MSUMS
produce five Common Analog output CVs: A SUM, B SUM, PW A SUM, PW B SUM, and FILT SUM CV.
These enable simultaneous pitch control and modulation for the voices, as follows.
R104 MASTER TUNE (MTUN) and R1 PITCH wheel adjust OSC A and B frequency directly— that is,
without computer processing— through A SUM CV and B SUM CV. To prevent interference with the
TUNE routine (see paragraph 2-13), the switches shown disconnect these controls during the TUNE
routine. In UNISON mode the KBD component of the FREQ CV appears through the UNISON CV. The
OSC B KBD and FILT KBD switches are for keyboard tracking in UNISON mode. UNISON CV is
processed through the Glide circuit which, essentially, delays quick changes in UNISON CV as GLIDE
CV increases. The OSC B MSUM is similar to OSC A. FILT SUM CV mainly consists of the FILT CTF CV
(which follows the FILT CUTOFF KNOB). An external FILT CV IN can be added through the back panel.
The VV-MOD signal, switchable to any MSUM consists of pink noise or LFO output as determined by the
W-MOD SOURCE MIX CV. CV inversion to the LFO VGA allows the NOISE and LFO levels to move in
opposite directions for a single CV. The MOD wheel sets this mixture's output level to selected MSUMs.
Besides the Common Analog output CVs there are two types of computer-output CVs which terminate
at the voices. First, Patch CVs control all five voices identically. For example, all five Amplifier Envelope
Generator attack times will be equal for any patch, so the Amplifier Envelope Generator ATK CV is wired
to the same terminal on all five AMP ENV GENs. Other Patch CVs include MIX OSC A, P-MOD ENV
AMT, and FILT RESONANCE. Second, the Individual CVs determine the frequency of a single VCO or
VCF alone. Each voice has two OSC S/H CVs and one FILT S/H CV. These signals contain the polyphonic
KBD component of the total FREQ CV applied to these devices. The ten OSC S/H CVs also contain INIT
FREQ control— actually common to the OSC As or Bs— and the TUNE "biases", which fine-tune
each VCO.
D.2
2-7
I P
> '
I
All processed CVs originate from the computer at a separate Sample/Hold (S/H). This circuit is discussed
in paragraph 2-12, but for introduction Figure 2-4, Detail A shows a typical S/H used with VC-devices.
Detail B adds a voltage-to-current converter (V-C CONV) required to control the operational
transconductance amplifiers (OTAs— see paragraph 2-5) used as "VCAs" in all places. Twenty-three S/Hs
on PCB 3 supply the Common Analog and Patch CVs and fifteen S/Hs on PCB 4 supply the Individual
OSCandFILTCVs.
Voice 1 is used for explanatory purposes, below. The five voices are functionally identical. See
schematics SD431 and SD334.
2-4 OSCILLATOR A, B, AND LFO
The Prophet's eleven oscillators— two per voice, plus one LFO— are based on the CEM 3340 integrated
VCO. The IC is scaled at IV/octave. This means an overall CV change of exactly IV ideally produces a
pitch change of exactly one octave. So a CV change of 1/12V (83.3 mV) changes pitch by one semitone.
In the voices the basic oscillator range is nine octaves; resulting from 0-5V supplied by the KBD and 0-4V
supplied by the OSC FREQ knob through the OSC S/H CV (see Figure 2-4). While most CVs in the
Prophet are quantized by only the most significant seven bits of a fourteen-bit DAC into 128 83.3-mV
steps (128 X 0.0833V = 10.67V), the OSC S/H CVs are quantized by the full fourteen bits into 16,384 651-uV
steps (16,384 x 0.000651 = 10.67). This finer resolution allows the TUNE circuitry to tune the oscillators to
within 1/128 semitone. It also allows the SCALE MODE feature, where each note can be raised or
lowered by up to a semitone. (For further information, see under DAC and TUNE, paragraphs 2-12 and
2-13). In UNISON mode the KBD CV is routed through the Glide circuit and the OSC MSUMs.
Additional OSC 1A FREQ control is created on Voice 1 itself through the POLY-MOD circuit. The
P-MOD FREQ A switch applies a CV mixed from the P-MOD FILT ENV and P-MOD OSC B AMT VCAs
to the OSC 1A CV SUM input. OSC lA's pulse width is controlled by two CVs at the OSC A PW SUM.
First PW A SUM CV originates in the Common Analog circuitry as the sum of OSC A PW and W-MOD
PW A (if ON). Second, the P-MOD PW A switch can add a CV mixed from the FILT ENV GEN and/or
OSC B. When on, the OSC A SYNC switch tunes OSC A to harmonic frequencies of OSC B or changes
OSC A's timbre when the two are not in harmonic relation. This occurs independently of whatever OSC
B waveforms are switched on.
OSC B is similar to OSC A except that besides being a pitch source it can be a modulation source
through POLY-MOD, and can operate as an LFO with or without KBD control. In the OSC B MSUM, the
OSC B LO FREQ switch adds a -7.5V offset through B SUM CV. To provide adequate control range, the
INIT FREQ control doubles its range (to 9V) when OSC B LO FREQ is ON.
The LFO itself is not controlled by the keyboard, and its pulse width is fixed at 50% (square wave). Its
output is a modulation CV effective through the five MSUMs.
Details of the 3340 and associated components can be found on its Data Sheet in the Appendix. All 3340
outputs are positive-going. But using the LFO and OSC B as a modulation source requires their triangle
peaks travel as far negative as positive for smooth vibrato. On Voice 1, circuitry containing U451-1 (see
SD431) shifts down the dc-level of the triangle to be symmetrical about ground.
While creating a symmetrical signal for modulation, the triangle level-shifting poses a slight problem for
the 4016, which is basically designed to pass only positive voltages. Figure 2-4, Detail C shows the basic
circuit used for switching all bipolar signals in the Prophet. Instead of being grounded, the Vss pin is
biased slightly-negative, allowing the switch to pass slightly negative voltages. Diodes at each switch
input protect the switch by clamping negative voltages to not exceed the diode drop, which is also the
negative bias value (0.6V), Where a bipolar voltage (such as P-MOD OSC B with OSC B TRIANGLE on) is
being switched, the level must be sharply attenuated, where a current (such as all sunriming nodes) is
being switched, the only voltage developed is by the 4016's ON resistance (300 ohm, typical) since the
op amp node following the switch is a virtual ground.
2-8
2-5 MIXER AND AMOUNT VCAs
The Mixer on each voice sets the level of selected OSC A or B waveforms sent to the filter. Noise level is
set in one place for all voices. All of the Prophet's VGA circuits use the RCA 3280 dual operational
transconductance amplifier (OTA). The OTA is similar to the typical op amp in input and open-loop gain
characteristics but the output is current rather than voltage. (So there must be a load to develop any
significant voltage.) The magnitude of the output current is equal to the product of the
transconductance (rather than the voltage gain) and the input voltage. The transconductance Is adjusted
by the amplifier bias current (labc) at pins 3 and 6 (see Appendix). A second terminal. Id at pins 1 and 8
control the transfer characteristic (as shown on Data Sheet). In effect, Id controls the input impedance of
the OTA. For example, with Id cut off, as at U464-1 MIX OSC A, U464-8 MIX OSC B and U428-1 P-MOD
OSC B, Zin ranges 100 Kohm. With Id active, as at U477-1 FINAL VCA, U422-1 P-MOD ENV and U422-8
FILT ENV, Zin ranges 600 ohm.
Since the 3280 is controlled by current, the term CV is not accurate in this context. All 3280 "CVs" are
converted to control currents by a 2N4250 PNP transistor as shown in Figure 2-4, Detail B.
In most places, BALANCE trimmers cancel OTA dc-offset, ensuring that even with maximum labc, there
is no output with no input signal.
The OTA is the central component in the Glide circuit, which also contains current mirror Q309 and
voltage follower U380-1. GLIDE OUT CV is fed back to the OTA input so positive or negative current will
flow if there is a difference between it and UNISON CV. When GLIDE CV is 0, labc will be maximum
because the diode-connected current source biases the other transistor's emitter 0.6V above ground.
Transconductance will therefore be maximum, so plenty of current is available to charge C376 and
GLIDE OUT CV will follow UNISON CV very closely. However as GLIDE CV increases, labc decreases,
reducing the rate of charge to C376. It will thus take longer for GLIDE OUT CV to approach UNISON
CV. This creates a slew between the discrete voltage steps of the input UNISON CV.
2-6 FILTER
The Prophet's five low-pass filters are based on the CEM 3320 integrated VCF. Its scale matches the VCO
scaleof 1V/OCT, so is also adjusted in semitones by 83-mV DAC steps. Filter frequency is controlled by
three CVs summed by U433-7 FILT FREQ SUM. FILT 1 S/H is the Individual CV, FILT SUM CV is the
Common Analog output, and the P-MOD FILT switch can add a POLY-MOD CV. R4133 adjusts the FILT
FREQ SUM gain.
Details of the 3320 and associated components can be found on its Data Sheet in the Appendix.
2-7 ENVELOPE GENERATORS
The FILT and AMP ENV GENs are based on the CEM 3310. Its output is a positive dc-voltage whose level
changes over the time periods set by the input timing CVs. When applied to the VCF and FINAL VGA,
the transient voltage determines the frequency and amplitude contours of the voice.
FILT ENV GEN output to the FILTER is controlled by the FILT ENV AMT VGA. (There is no comparable
attenuator for the AMP ENV GEN.) Note the P-MOD FILT switch is a redundant path for the FILT ENV
GEN output. The switch is provided for OSC B to modulate the FILTER.
Details of the 3310 and associated components can be found on its Data Sheet in the Appendix.
Note that the ATK, DEC, and REL times are controlled by to -5V and the SUS level is set by to +5V.
Accordingly, the computer inverts its normal to +10V output so +10V corresponds to minimum, and
corresponds to maximum time. The resistor network shown for the AMP ENV GEN (R415, R407,
R402. . . R403) divides the 10-V range by two and performs the required negative level-shift. The FILT ENV
GEN is controlled in the same way.
2-9
2-10
2-8 AUDIO OUTPUT
As shown in Figure 2-4, the VOL CV follows a long path from its source on PCB 3 to the back panel, up
to the control panel, and back to PCB 4. If external dynamic control such as a footpedal is used, it
(Instead of U372) supplies VOL CV through RUB. (When troubleshooting for no audio output, check J7).
R4545 in series with U481 minimizes the possibility of oscillation with capacitive loads. R4544 reduces
hum resulting when the Prophet is switched off but left connected to an energized amplifier.
2-9 MICROCOMPUTER SYSTEM DESCRIPTION
A microcomputer system consists of electronic hardware and program "software." The microprocessor
(or CPU) constantly reads the program instructions from read-only memory (EPROM) which directs the
processing of inputs such as switch actions, knob settings and keystrokes into switch commands and CVs
for the synth. This section concentrates on hardware functions associated with this processing. The
assembly-language program itself is not covered in depth as It is proprietary. But knowledge of the
program Is not required either to learn how the Prophet operates or to service it. In fact a good deal
about what the program must do can be inferred from a thorough understanding of what the hardware
does.
See Figure 2-5. If you are unfamiliar with microcomputers you might find it helpful to focus on the Data
Bus, to which the CPU, Memory, and all Input/output (I/O) devices connect. All processing is
communicated over this bus. But since the bus can signify only a byte (comprised of eight bits) at a time,
data must be transferred sequentially, a byte at a time. Conflicts between data senders and receivers —
actually, bus drivers and latches — are prevented by Chip Selects (CS) generated by the Memory
Address, Input Port, and Output Port Decoders. Each memory device, bus driver or latch can only send
or receive data when Its CS Is active, and no two CSs can occur at once. Each CS Is decoded from a
unique combination of Address and Control Bus signals. All memory devices have A0-A9 In common.
These lines signify up to 1024 (Ik) addresses. Individual memory devices are differentiated by decoding
A10-A12 and -MREQ into CSs which select the appropriate 1-K block. The I/O Port Decoders share
A0-A5 with Memory, but only issue CSIs or CSOs when -lORQ goes low. While -MREQ and -lORQ
indicate Memory or I/O can "converse" with the CPU, -WR and -RD indicate the direction of the
transfer is from or to the CPU.
The Scratchpad RAM contains tables which represent the status of the switches, keyboard and knobs.
In PRESET mode the Scratchpad's switch and knob tables are loaded by data from NV RAM when the
current program is selected. NV RAM contains 40 such sets of programs. In PRESET pressing a switch or
turning a knob is an EDIT operation which changes the Scratchpad tables, but has no effect on the
original program in NV RAM unless the EDITed tables are specifically recorded (In place of the original
program).
Paragraphs 2-11 and 2-12 detail how the input circuits generate data which controls the synth through
the output circuits. Although it may take, for example, several thousand data bus operations to
completely scan the keyboard and establish the appropriate oscillator CVs, you perceive no delay
between a keystroke and the note produced because of the speed at which the program is executed.
The basic program "loops" every 6 ms (166 times per second) to maintain the current status of the
machine. Any status change such as a keystroke or control operation extends the loop time to about
11 ms.
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MICROCOMPUTER ABSTRACT SCHEMATIC
2-11
. '
2-10 MICROPROCESSOR, MEMORY, AND I/O INTERFACE
Please see Figure 2-5 and schematic SD331. The Power Detector (PWR DET) circuit controls CPU start-up
and shut-off through the Clock and -RESET signals. PWR DET also contains battery BT301 which provides
back-up power, Vnv, for Non-Volatile (NV) RAM. The NV RAM's low current requirement allows the
battery a ten-year life expectancy.
WARNING! BT301 MAY EXPLODE IF SHORTED FOR ANY LENGTH OF TIME, ALTHOUGH IT WILL
USUALLY "JUST" VENT NOXIOUS GASES.
Vnv also powers U309, CMOS quad NOR gate. With power off, inverter-connected U309-10 is high. This
high and that through D301 make U309-13 low holding the CPU -RESET. -RESET initializes the CPU and
resets its program counter (PC) to execute the instruction in location 0000 once the Clock starts and
-RESET goes high.
When power is switched on the CPU CLOCK starts immediately because the lower power supply
voltages stabilize before the higher voltages. When power is switched off, the higher supply voltages
decay more quickly. If the CPU is being clocked while power rises or falls, the EPROMs could
conceivably cause spurious data to be written Into NV RAM, since they operate on a higher voltage than
the CPU (+12V as opposed to +5V). Accordingly, PWR DET immediately resets the CPU when power
drops, and disables the NV RAM -CS (see below). Divider R303/R302 monitors the highest power supply
voltage, which must achieve full value for U309-10to go low. This discharges C303 through R3-1 so after
about one second U309-3 goes high, starting the CPU. With the power on, D303 provides 5V for Vnv.
The Data, Address and Control Buses were basically described in the preceding paragraph. A0-A9 set up
one out of 1024 addresses on all the memory chips, while the specific 1-K block CS is decoded from
A10-A12, -MREQ, and -RFSH. -MREQ actually signifies the Address Bus Indeed holds a valid address for
a memory read or write operation. Intended for use with dynamic RAMs, -RFSH indicates the Address
Bus instead holds a refresh address. Therefore to enable any memory, -MREQ must be low and
-RFSH high.
A15, the most significant Address Bus line is gated with the ENABLE RECORD (ENA REC) signal through
U320-11. ENA REC is pulled high by R308 unless grounded by the back-panel RECORD
ENABLE/DISABLE switch which, of course, prevents unintended recording into NV RAM. Gating A15 in
this way means that although NV RAM Is read from memory addresses OCOO-OFFF(H), it is written into
through addresses 8C00-8CFFF(H)— rather than just relying on the usual -RD and -WR signals.
-WR indicates the Data Bus holds valid data to be stored in the addressed memory or I/O device. -RD
indicates the CPU wants to read data from memory or an I/O device. -lORQ indicates A0-A7 hold a
valid address for an I/O operation. The -INT input is discussed in paragraph 2-15.
J'
The Prophet's program is contained In three 2708 1024 x 8-blt ultra-violet erasable programmable
read-only memories (EPROM) occupying addresses 000-03FF (ROMO), 0400-07FF (ROM1) and
0800-OBFF (ROM2). Since no write operations are performed into ROM, the appropriate CS is sufficient
to place an instruction on the bus.
THE NV RAM which holds the patch programs is made from eight 6508 1024x i-bit CMOS static RAMs.
Total current demand on the backup battery is 10 uA, or less. Many steps have been taken to protect NV,
although cassette storage makes a catastrophic NV RAM failure unnecessary.
TECHNICIANS SHOULD BACK-UP PROGRAMS THROUGH THE CASSETTE INTERFACE BEFORE
SERVICING, (IT TAKES ONLY TWO MINUTES.) PLAYERS SHOULD BE ENCOURAGED TO BACK-UP
THEIR PROGRAMS ON CASSETTES AND/OR ON BLANK PANEL DIAGRAMS (INCLUDED IN
OPERATION MANUAL), SINCE IT IS ALWAYS POSSIBLE FOR PROGRAMS TO BE LOST THROUGH THE
COURSE OF SERVICE.
2-12
NV RAM read and write operations are controlled by the gated A15 and the -NV CS which is only gated
through U309-4 if power is on. -NV CS causes the RAM to latch the address bus and place the addressed
data on the Data Bus. The CPU acknowledges receipt of the data by setting -NV CS high. For a memory
write operation, -NV WR goes low to set "WRITE MODE," and the data is written when -NV CS returns
to a high state.
I
Two 2114 1024 X 4-bit NMOS static RAMs comprise the Scratchpad RAM. The read and write logic for
5PAD is similar to that for NV, with added gating ensuring -WR or -RD is low for the SPAD RAM -CS to
appear at U310-8.
U315 is an 8253 Programmable Interval Timer (PIT) used in the TUNE and A-440 circuits. For discussion,
see paragraph 2-13.
As mentioned above, the I/O Port Decoders issue chip selects which control input sources and output
destinations. Table 2-0 shows how all CSs are specifically decoded. Eight of the fourteen Output -CS,
undergo a voltage shift from 5-V to 15-V levels. The reason is that the analog switches for 10-V level
waveforms in the synth must operate on +15V, therefore so must the latches which control the switches
and, likewise, the decoder which controls the latches. Seven bits of the Data Bus itself are also shifted
up. by U327, for compatibility with the high-voltage latches and DAC.
Table 2-0
CHIP SELECT DECODING
CS NAME
FUNCTION
-MREQ
-lORQ
-
ROMO
ROMO
X
ROM1
ROM 1
X
ROM 2
ROM 2
X
NV
X
RAMI
SPAD
X
TIMER
X
CSIO
KBD/SW
CSI1
CASS/MISC
CSI2
ADC
CSOLO
LED DRVR
CSOL1
LED SINK
CSOL2
KBD/SW DRVR
CSOL3
POT MUX ADR
CSOL4
CA5S/TUNE
CSOL5
CLEAR INT
CSOHO
PROG SW
CSOH1
PROG SW 1
CSOH2
PROG SW 2
CSOH3
S/H ABC/TUNE
CSOH4
S/H
CSOH5
GATES
CSOH6
DAC LSB
CSOH7
DAC MSB
1 =
= DIGITAL HIGH
=
= DIGITAL LOW
(H) =
= HEXADECIMAL
x =
= DON'T CARE
-WR
X
X
X
X
X
X
1
1
1
-A10-A12
AO-A
X
1
X
2
X
3
X
4
X
6
X
X
01(H)
X
02
X
04
X
00
X
08
X
10
X
18
X
20
X
28
X
30
X
31
X
32
X
33
X
38
X
39
X
3A
X
3B
2-13
For troubleshooting, it should be emphasized that most computer malfunctions are caused by failures of
devices connected to the Data Bus. For example, any shorted latch input can prevent an entire data line
from ever being high. Shorts between data lines will also confuse the computer terribly. Shorts may
occur within a device or between the PCB traces. If you suspect a data bus problem try to pick out the
line(s) with questionable levels: low should be 0-500 mV^ high 4-5V (3.5V min for CMOS), as shown in
Waveform 2-OA. Readings of IV or 1.8V, for example, indicate a failure. The general procedure is to first
remove socketed PCB 3 devices: CPU, EPROM, SPAD RAM, and NV RAM— WHICH WILL CLEAR THE
PROGRAM MEMORY! If this doesn't locate the problem you may have to cut traces. REMEMBER-
SINCE THE COMPUTER WAS OBVIOUSLY RUNNING AT ONE TIME, THE SHORT IS MORE LIKELY TO
BE DEVICE FAILURE THAN A PC-SHORT, SO BE SURE TO CHECK ALL POSSIBLY BAD COMPONENTS
BEFORE CUTTING TRACES. The customary technique is to make the first cut at the electrical center of a
bus line to isolate the problem to one half or the other. Then halve the trace again, and so on, until
correct levels are restored. To prevent other malfunctions, cut traces should usually be repaired just after
they have yielded information on the direction of the short. Note that a short on the high-voltage data
bus (DBH) will not usually degrade computer operations since DBH is buffered from DB. However it will
be easy to check DBH for malfunctioning switch bits, GATE bits, or S/H addresses.
A DBO, U311-14
B 2.5 MHz CLOCK
V:
H:
2V/div
1 us/div
Waveform 2-0
DATA BUS AND CLOCK
2-14
^ .
2-11 CONTROL MATRICES
This paragraph describes how the computer scans the control panel to learn what keys or switches have
been pressed, and to light the LEDs imbedded in switches that are on. As input devices, switches and
keys are scanned indenticaily. In both cases the microcomputer maintains tables in Scratchpad RAM
which correspond to the status of the Switch/Keyboard Matrix (SW/KBD MIX). That is, each switch or
key has a corresponding memory bit which is set (1) or reset (0) if the switch or key is on or off. Although
similar in structure the switch and keyboard tables are interpreted quite differently. For example the
W-MOD FREQ A switch bit causes a digital output to close or open a solid-state switch, and light or
extinguish its LED. But a key bit is converted to a key number (1 - 61) which becomes an OSC FREQ CV
through the DAG. In addition, the fact of a key going on or off must be stored for voice assignment and
generation of the CATEs.
The SW and LED MTX are divided across PCBs 1 and 2; principal components being shown on schematic
SD232. The keyboard is wired into the SW MTX through J201. The LED MTX includes all the elements of
DS224 dual BANK^PROGRAM display; all seven-segment decoding being done by software.
The program scans the keyboard first. The basic procedure is to activate one matrix row of eight
consecutive keys, then check the intercepting columns for the presence of a bit. The resulting data sent
to the GPU by the column bus drivers uniquely identifies a combination of switch closures in each row.
Specifically, to scan the first eight keys the CPU sends the number 08(H) to the SW/KBD ROW
DECODER by clocking -CSOL2. This selects 58 (U212-18), which holds the first matrix row high. If CO EO
and GO happen to be held, the number 10010001 (91H) will be sent to the CPU when it clocks the bus'
drivers with -CSIO. This number is then placed in Scratchpad; becoming the first byte In the keyboard
table. To read the next key row the CPU increments the driver to set S9, and reads the second key tabl
byte, '
Switches are scanned to fill a Scratchpad RAM table in the same way when the CPU sets the driver S0-S4
The diodes wired throughout the SW/KBD MATRIX allow n-key rollover, which is the simultaneous
pressing of any number of switches and keys. They prevent switched bits from returning through other
closed switches on the same column, which would activate other rows.
For troubleshooting it must be emphasized that most keyboard problems are caused by dirty bent or
broken J-wires. Dead notes not caused by J-wires usually occur in groups of eight, making it easy to
isolate the problem row or column. If a switch does not function and its LED doesn't light, the problem
must be in the SW MTX. Check other switches to isolate malfunctions to a single row or column If the
LED lights but the function is not enabled, the problem must be in the corresponding output latch
solid-state switch (4016), or analog circuitry.
The LED matrix operates on the same line-by-line technique used to scan the switches and keys. In fact
the LEDs are "mapped" similarly to the switches so the two tables will correspond. First a number from
the Scratchpad LED table representing active LEDs in the first column is latched by the LED DRIVERS
U204/5 as port -GSOLO. Then the first column is pulled low-causing current to flow through LEDs
whose anodes are being pulled high— through U206-10 by latching data 01(H) to U207/08 LED SINK
port -CSOL1. To output the next column, the CPU sends the next LED table byte to the LED DRIVERS
and rotates the LED SINK bit to pull the second-row cathodes low, and so on. The LEDs are therefore not
constantly It they only seem so due to persistence effects accompanying our sight. Some owners may
notice a slight difference in brightness between the BANK and PROGRAM numeric displays or
complain of them flickering while playing. Both effects are normal, resulting from different scan times
for each display, and from the lengthening of the "loop" time with each new keystroke
2-15
2-12 ADC, DAC, AND CV OUTPUTS
The DAC is the essential interface between the control potentiometers and microcomputer and
between the microcomputer and the synthesizer. It is based on the 16-bit, integrated DAC-71-CSB-I.
However, at most, 14 bits are used only for precisely controlling the oscillators while, normally, seven
bits provide adequate resolution for all other computer-processed CVs. The DACs full scale voltage is
10.67V, but most CVs are limited to 10V by the software.
J
For editing or manual operation, the DAC performs analog-to-digital conversion (ADC).' This is done by
outputting one of 24 entries from a Scratchpad RAM table of pot settings, at the same time the actual
pot is being sampled through the ADC "window" comparator (ADC CPR). (Actually, the 10-V DAC
range is divided by two for comparison with 5V-range pots.) The comparator signals ADC HI or ADC LO
if the pot wiper is actually set below or above the value of the converted table entry. As long as the
voltages don't match, the table value is decremented or incremented until they do match. Once all the
pots have been checked, a few adjustments are made (depending on the mode of operation), and the
DAC again converts the pot values, this time distributing them and the oscillator and filter CVs to the
synth. Thus, the DAC output, Vdac, steps between 62 values (24 pots + 38 CVs) (during each 6-ms loop.
The POT MUX output, Vmux, assumes the value of the settings of ail 24 pots during the first part of each
loop. This is shown in Waveform 2-1a. In Waveform 2-1b, Vdac is shown assuming the 24 comparative
pot values and the 38 CVs.
A VMUX, U365-9
B VDAC, U364-7
V:
H:
2V/div
.5 ms/div
(approx.)
Waveform 2-1
VMUX AND VDAC
The POT MUX is shown on SD231. Basically, data latched by U211 selects (or, addresses) one of 24 pots at
a time, whose wiper voltage becomes the Vmux sent to the ADC comparator. The address latch bits QO,
Q1, Q5 have a decimal value 0-7. Waveform 2-2 shows QO toggling when clocked. Applied to the A, B,
C, inputs of U201-03, these bits simultaneously select one of eight inputs on each 4051. When high the I
inputs inhibit the 4051; so to select just one pot, Q2, Q3, or Q4 must be low.
2-16
1
A -CSOL3, U211-9
B QO, U211-2
V:
H:
2V/dlv
50 us/div
Waveform 2-2
POT MUX LATCH
U211's state is undetermined on power-up, since the computer has not yet had time to initialize the POT
MUX by setting aii inhibits high. U211 might well "come up" with more than one low for Q2, Q3, and
Q4. In such cases two or more pots would be connected together at Vmux. The current surge resulting
from any significant potential difference between their settings would instantly destroy a 4051, were it
not for R203/R206/R209.
To check the pots the CPU first places data 18H on the bus and clocks the POT MUX address latch with
-CSOL3. This sets Q2 and Q4, inhibiting U201 and U202. With Q3 reset (0), U203 connects R105 FILT ATK
wiper from pin 13 to 3. If the knob is set halfway, +2.5V (Vmux) will appear at the common input of the
ADC CPR, U365-9/10 (see schematic SD332).
Next the CPU takes the first pot table byte from SPAD RAM, places it on the bus, and latches it to the
DAC HI latch U337 (and U342-5), port -CSOH7. If we assume this pot has not changed position since the
'ast loop, the converted data should compare with Vmux. Thus data 3C(H) pulls DAC bits 11, 12, 13, and
14 low through U344/45 inverters. The DAC has a current output which U347 converts to voltage, in this
case 5V (2.667 + 1.333 + 0.666 + 0.333V). R334/35 and R336 divide by two so 2.5V appears at U364-7. Since
this equals Vmux, neither comparator output goes high. The network containing D306/07, and R366-71
provide ''hysterisis", such that the difference between Vdac/2 and Vmux must be more than 34 mV
before the comparator will activate. Pot drift is also eliminated through software hysterisis which
watches the direction of pot changes. A pot must move two steps in the same direction to qualify as a
legitimate change. To check the remaining pots, the CPU latches data 19-1F, 28-2F, and 30-37(H) to port
-CSOL3. When done, data 38(H) clears the POT MUX. Waveform 2-3 details Vmux.
Having updated its Scratchpad RAM tables of switch and key status and of pot values, the CPU is now
ready to output the appropriate CVs. Certain adjustments need to be performed, such as figuring the
tuning biases according to the notes to be sounded (see paragraph 2-13), and inverting the envelope
generator timing voltages (see paragraph 2-7). If UNISON mode is on, the KBD CVs are removed from
the OSC S/Hs. GLIDE CV is also switched on in UNISON
2-17
i
VMUX, U201-3
r
i i
■■H- ■- jMg 1 — -^ '
^^ 4liM'
, ^
V ■
^ ■
V
■ - ■■
^ -.
^ - ' -t' - : ' ^ '
p ^-.-^.^^S ^ .^i-j y^ V .. V ^ -p ^ -J "t y' ^ ^.^ ■>
1 ■ - .
p
y
^ ^ ^y^ - V J
>
<
y
2V/div
.2 ms/div
Waveform 2-3
VMUX
TheCV DMUXisthe reciprocal of the POT MUX. In fact it uses the same 4051 devices, though wired so a
single input can be routed to one of 38 destinations. As in the POT MUX, CV destinations are addressed
by data latched from an output port. And since CV distribution is sequential, a short-term sample/hold
(S/H) analog memory is provided at each destination to ensure the synth is isolated from the pulsing
Vdac. Each S/H consists of a lovc/-leakage capacitor in shunt with the non-inverting input of a TL082
JFET-input op amp (BIFET) voltage follower. The BIFET has extremely high input impedance — several
thousand megohms. The computer-output process of strobing the S/Hs only allows a few microseconds
for each S/H to acquire a specific value of Vdac. The S/H capacitor is large enough to hold this charge
for 11 ms (the longest loop time) but low enough to quickly recharge to a higher or lower Vdac when
next strobed. Between strobes, or whenever the 4051 is inhibited, the S/H output remains constant
because there is no discharge path for the capacitor. As a practical matter S/H output can be expected
to "droop" up to 1/2-mV over 7 ms. Droop greater than this is usually BIFET failure (input leakage). Of
course capacitors can also leak, and if open, will make the S/H output pulse.
Using the FILT ATK example above, data 3C(H) is again sent to the DAC through port -CSOH7,
producing a Vdac of 5V (Remember that the six ENV GEN timing CVs are inverted in software). Port
-CSOH4 S/H STROBE latch U339 (see schematic SD333) sets S/H 10, II, 12, 13, and 14 all high, inhibiting all
DMUX 4051s. Port -CSOH 3 latches data 00. S/H 10 then goes low enabling U357 which strobes C346 and
U362-7 with 5V. 10 returns to a high state, completing the first strobe. In short, the DMUX 4051s are
always inhibited while Vdac is changing value.
To set oscillator pitch, first the most significant DAC bits are latched through -CSOH7, then the least
significant DAC bits are latched through -CSOH6. The Individual CV DMUX is located on PCB 4,
controlled by S/H A, B, C, 13, and 14 (see schematic SD430).
2-18
' i
2-13 TUNE AND A-440
The synthesizer and microcomputer circuits employed for polyphony and programmability having been
covered, this paragraph explains the third main feature resulting from the Prophet's A/D hybrid
technology. The TUNE system has only been briefly mentioned before, but it is responsible for the
entire performance of the instrument in the sense that without its corrective influence, the Prophet's
ten voice oscillators could not be expected to stay in tune over their nine-octave range. The reasons for
this are several.
There are two basic parameters to work with in tuning. One is initial frequency (INIT FREQ) that is, the
specification that all ten oscillators sound the same pitch given the same, steady CV. The other is SCALE
(or, V/OCT), which desires a predictable pitch change to accompany a specified CV change. INIT FREQ
errors can be introduced by any of the many sources of oscillator control. While summing resistors in
the Common Analog circuitry are precision-matched, errors may still result from the combination of
MTUN. P-BND, W-MOD, UNISON, and FINE (on OSC B). In the voices the A SUM and OSC S/H CV
summing resistors and P-MOD FREQ A circuits are error sources. SCALE errors generally occur in the
VCO itself. For example, while a CV change from IV to 2V may produce an exact octave interval, a
change of 5V to 6V might cause a pitch change of greater or less than an octave. All VCOs have this error
to some degree somewhere in their range. For an IC, its associated components, such as the SCALE
trimmer, can contribute error. Chips age, and their parameters will change with changing
temperature — although this effect is significantly reduced with on-chip temperature compensation
circuitry (see Appendix).
Actually, TUNE has two stages, only the first of which occurs when the TUNE switch is pressed. In less
than ten seconds the microcomputer samples each VCO frequency at octaves, while using successive-
approximation to determine the exact 14-bit CV required to tune the VCO to a reference. The system
measures the period of each oscillation in terms of CPU clock cycles. The difference between the ideal,
83mV-step CV which should produce the reference frequency and the 14-bit, 651 -uV CV which actually
does so is called bias. Biases for each oscillator are determined at the ten C's (CO - C9) across the VCOs'
full range. The biases are placed in a 200-byte table in Scratchpad RAM (1 bias/oct x 10 oct x 2
bytes/bias). The second stage of TUNE occurs while playing. Whenever an OSC S/H CV is to change in
response to a keystroke, the computer determines the new note's position between octave bias-points,
and calculates the exact bias for that semitone. ^ , -? A'''
The first stage functions as follows. First the CPU disables the PITCH wheel, MTUN, and UNI CV, by
opening switches in their signal paths. The TUNE circuit consists of 1036^/40 TUNE MUX (see Figure 2-5
or schematic SD430), U435 TUNE CPR, and Counter (CNTR) and 2 of U315, a three-section 8253
Programmable Interval Timer. (CNTR 1 is used for A-440, discussed below). When activated, the TUNE
MUX sequentially connects each oscillator output to the TUNE CPR in the same way the POT MUX
samples pots for the ADC CPR. The TUNE CPR converts the sawtooth to pulses. With no input at U435-3,
R4158/R4159 hold U435-2 at 1.36V, so U435-7 is high. U435-3 increases with the positive-going sawtooth,
so that when it crosses 1.36V, U435-7 goes low. R4170 feeds-back the transition to prevent oscillation
(hysterisis).
The TUNE flip-flop (FF) must be explained in conjunction with the 8253. The PIT contains three
independent, multi-mode, 16-bit presettable down-counters addressed as memory locations 1800-
1802(H), plus a control word register at 1803(H). TIMER -CS must be low for all write or read operations.
-WR or -RD indicate the CPU is writing a control word or count, or expecting a count. During
initialization (on power-up) each counter's mode is programmed by a byte written into the control
word register. CNTR operates in ''one-shot" mode. It is programmed to, at first, count one oscillator
pulse. But the 8253 actually requires an extra clock pulse— which we call a "fake clock"— to accurately
begin the count. Therefore each oscillator sampling is preceded by the fake clock pulse from the TUNE
FF, under control of U332, port -CSL04 (see schematic SD332). After the fake clock pulse, FFD goes
high, allowing the TUNE FF to invert TUN MUX through -Q (U322-6).The TUNE FF is then constantly
cleared in preparation for each new oscillator pulse.
D.2
2-19
i
With CNTR enabled by CNTR EN at U332-5. OUTO (U315-10) goes low at the first oscillator edge from
the TUNE CPR. U321-1 inverts this to a high which gales CNTR 2. CNTR 2 is programmed to count CPU
clock cycles, so it decrements at the rate of 2.5 MHz. When CNTR reaches its terminal count, that is,
when one pulse (iri addition to the fake clock) has been counted, OUTO goes high, stopping CNTR 2.
CNTR 2's 16-blt register now represents the number of CPU clock cycles occuring during one period of
OSC lA's sawtooth. This number is compared to a reference. An oscillator that is too sharp will have a
lower count than the reference, and vice versa. As long as the count and reference don't match, the
CPU adjusts the OSC S/H CV and samples the sawtooth again. Successive approximation starts with the
DAC MSB, setting each bit which does not cause the oscillator pitch to overshoot the reference.
After tuning OSC 1 A at C3, the reference count is halved to tune CA, since one cycle at C4 should take
exactly half the number of CPU clock cycles than at C3. For octaves C5 - C9, the cycle count in CNTR is
doubled instead (2, 4, 8.. .32). The CO- C2 biases are actually extrapolated from the curve suggested by
the C3 - C9 bias table, rather rhnn found by dir{?ct measurement because counting such low-frequency
pulses would take an inconvenient amount of time. The remaining oscillators are tuned in the
same way.
4
When enabled by U332-12, CNTR 1 simply divides 2.5 MHz by 5682 to produce the 440-Hz square wave
summed into the AUD OUT stage (see SD430). To prevent noise, the A-440 input is grounded by U460-9
when not in use. by inverter-connected U461-9.
2-14 SEQUENCER INTERFACE
The sequencer interface is intended for use with SCI's Model 800 Digital Sequencer, although the
design is flexible enough to interface with many types and qualities of analog inputs. For sequence
recording the Prophet outputs the keyboard CV and a trigger pulse for the most recently played note in
polyphonic mode, and for the lowest note played in UNISON mode. To playback, the sequencer sends
the same CV and trigger pattern to the Prophet, which digitizes the SEQ CV IN for control of Voice 5.
I
The Prophet's sequencer output (record) circuitry is the same as the synthesizer output circuitry. SEQ
CV OUT appears at S/H U350-7 before buffering by voltage follower U348-6 (see schematic SD333). The
SEQ TRIG OUT Is a bit latched by port -CSOH5, U340-2.
The sequencer input (playback) circuitry is a bit more complex (see schematic SD332). Connecting
SEQUENCER.GATE IN closes a switch on J3 grounding U323-10. When port CSI1 is input, this low notifies
the computer to process the two SEQ inputs. SEQ CV IN is assumed to be an analog voltage which slews
between its various values. The slew rate will vary with the type of sequencer (or other accessory).
Ideally, the input device only produces its GATE once its CV output has fully stabilized. However, in the
worst case some accessories will continue to slew after producing the GATE. For this reason the Prophet
delays the SEQ GATE IN te allow SEQ CV IN time to settle, by using the interrupt (-INT) feature of
the CPU.
I
During initialization the Z-SO's interrupt mode is programmed so that a low on the -INT pin forces the
program to restart at memory location 38(H) (when the interrupt has been software-enabled). This is the
starting address of the SEQ HANDLER subroutine. Initialization also clears the -INT through port
-CSOL5. U331-12 inverts this -CS to +CLR INT which resets U330-4, making -Q high. U330-13, Q remains
low, being held reset by U331-4. When a GATE appears. U331-4 goes low and U331-2 goes high after a
2-ms delay through R311/C316. This high clocks U330-3, producing the -INT pulse at U330-2.
When it receives the -INT, the CPU completes its current instruction, placing the next instruction
address and register statuses on the "stack", then enables the SEQ CV IN by latching EN SEQ through
port -C50H4, U339-2 (see schematic SD333). This bit closes switch U371-9, connecting the SEQ CV IN to
the ADC CPR. The SEQ CV is then determined through successive-approximation and stored in a
Scratchpad table for later addition to Voice 5. After the voltage is processed, the CPU again clears the
interrupt. However, this time U330-13 goes high, gating voice 5, because U330-10 is being held low by
the SEQ GATE IN through U331-4. When SEQ GATE IN turns off, U330-13 is again reset.
2-20
2-15 CASSETTE INTERFACE
The cassette interface hardware is simple (see schematic SD332). For storing on tape, bits are serially-
latched out through MISC output port -CSOL4, U332-7, filtered by R324/C351, and ac-coupled to the
recorder input by C352. For loading from tape, the pulses are ac-coupled by C361 and squared-up by
the CASS CPR which, as a zero-crossing detector, is insensitive to phase or polarity variations between
recorders. R343 and R344 form a divider parallel with divider R342, R430, R337, and R341, each having a
threshold of about 0.9V. D305 clamps the pulses to not exceed -0.6V. Read bits are input through MISC
input port -CSI1. Since allowance must also be made for speed variation, a technique of counting edges
rather than identifying logic states must be used.
Organized as 40 24-byte programs, NV RAM contains 960 bytes. The least-significant seven bits of each
byte represents a pot setting of - 127 steps, while the MSB represents a switch setting (1 = on, O=off).
(When selecting a program in PRESET mode, a set of twenty-four bytes is transferred to the Scratchpad,
with the pot bits filling the pot table and the switch bits being regrouped into the switch status table.)
Interface timing is based on a unit called a minim, which is equivalent ot 232.4 us. Each bit is transmitted
or received over a 12-minim period (2.8 ms), with a few microsecond space between them. To write, the
interface simulates frequency-shift keying (FSK) by toggling the output latch every minim to indicate a 1,
and every fourth minim to indicate a 0. These rates correspond to approximately 2151 Hz (1/234 us x 1/2)
and 538 Hz (2151 Hz/4). When reading from tape the interface counts the edges received and loads a 1
or into NV RAM depending on whether the number of edges is greater or less than seven. The
absolute number of edges need not be detected in any specific period, thus providing range to
accommodate wow and flutter in the cassette deck.
2-21/2-22
3-0 DOCUMENT LIST
SECTION 3
DOCUMENTS
SHEET
DOC No.
BD031
PP131
A
5D131
PP231
B
5D231
C
SD232
PP331
D
SD331
E
SD332
F
SD333
G
SD334
H
SD430
PP431
1
SD431
J
SD432
K
SD433
L
SD434
M
SD435
PP53T
N
SD531
TITLE
PAGE
INTERCONNECTION 3-3
PCB 1 PARTS ID 3-4
PCB 1 CONTROLS 3-5/3-6
PCB 2 PARTS ID 3-7
PCB 2 POT MUX 3-8
PCB 2 CONTROL MATRICES 3-9
PCB 3 PARTS ID 3-10
PCB 3 CPU, MEMORY, I/O INTERFACE 3-11
PCB 3 DAC, ADC, TUNE, SEQ, CASSETTE 3-12
PCB 3 CV DMUX, LATCHES 3-13
PCB 3 W-MOD, MASTER SUMMERS 3-14
PCB 4 CV DMUX, TUNE MUX, AUD OUT 3-15
PCB 4 PARTS ID 3-16
PCB 4 VOICE 1 3-17
PCB 4 VOICE 2 3-18
PCB 4 VOICE 3 3-19
PCB 4 VOICE 4 3-20
PCB 4 VOICE 5 3-21
PCB 5 PARTS ID 3-22
PCB 5 POWER SUPPLY 3-23/3-24
3-1 DOCUMENT NOTES
These notes explain component designation and the use of symbols on our documentation. For glossary
of abbreviations, see Section 6.
Component designators include three items of information:
COMPONENT CLASS
PCB NUMBER
R4122
COMPONENT NUMBER
COMPONENT CLASS is symbolized by standard letters, for example, U for integrated circuit, RT for
temperature-sensitive resistor, and DS for indicator.
3-1
PCB NUMBERS are:
PCS 1 RIGHT CONTROL PANEL
PCB 2 LEFT CONTROL PANEL
PCB 3 COMPUTER BOARD
PCB 4 VOICE BOARD
PCB 5 POWER SUPPLY BOARD
No PCB NUMBER is given for chassis-mounted components.
COMPONENT NUMBERS are sequenced according to their position on the PCB.
We bus lines together to prevent long; confusing parallel runs. For example, DATA BUS lines are drawn
as a single line, with individual lines symbolized DBO, DB1, DB2. . .where the bus "fans-in" or ''fans-out"
at a device. If there are no DB (or A, ADDRESS BUS) symbols, the bus lines are assumed to connect
according to the device pin names.
Although bussing wires reduces the number of interrupted signals, some breaking of lines on a page or
continuation of signals between pages cannot be avoided. At these points you will find symbols such as:
on Sheet D
on Sheet F
U329
4
-CSHOO
U355
U355-9
U329-4 D
-CSOHO
The pointers indicate signal flow. The sheet letter symbol is found In its margin.
Connectors are drawn according to whether the pins are male or female, so the arrows do not
necessarily Indicate signal flow.
Zeros are slashed (0) only where needed to prevent ambiguity.
Power and ground connections for multi-device packages have been shown on the first device in the
package, except where the first device is not presently used.
Unless otherwise indicated resistances are in ohms and capacitances are in microfarads.
3-2
TOP PANEL ASSEMBLY
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13-23/3-241
SECTION 4
SERVICE
4-0 GENERAL
This section contains detailed service instructions for complete functional testing and for all
adjustments. Instruments to be serviced should be thoroughly tested beforehand. This will verify a
malfunction has indeed occured, perhaps reveal related or unrelated malfunctions, and provide a basis
for troubleshooting. The tests suggest trims v^hich may restore normal functions. If the problem(s)
persist, you will have to rely on Sections 2 and 3 and your troubleshooting skills to locate the defective
component(s).
Throughout the functional tests you must play five different keys to test the five individual voices. All
tests are performed by ear; the object generally being consistency between the voices. There will always
be slight variations between the voices. If not excessive these differences help to "warm" the Prophet's
sound.
Note that while all tests can be performed with the cabinet unopened you will have to open the cabinet
to identify the individual voices since there is no reliable way of identifying them by merely listening. To
check a single voice, its GATE or Final VGA output can be probed, or its relative volume manipulated
(see paragraph 4-22). You may also be able to use the fact that the first voice assigned after the TUNE
routine is Voice 1.
I
Prophet trimming is a sensitive procedure which as a rule should not be done more than necessary.
Prophets are carefully adjusted at the factory, where many trimmers are sealed to prevent
misadjustment by vibration or accident. You will rarely be able to make an audible improvement upon
these trims— unless a malfunction has occured or a part has been replaced. If you do try to ideally set all
54 trimmers when no repairs have been involved, you may succeed only in correcting for the difference
between our DVMs or room temperature and yours.
Most trims require a 4-1/2 digit DVM. An oscilloscope (preferably, dual-trace) is required for filter
tuning and for serious troubleshooting.
These procedures are presented in the order recommended for a Prophet assumed to be 100%
electrically functional but untrimmed. Real-world problems may require you change the order of some
tests and adjustments. Therefore each procedure is written to be performed independently of the
others.
4-1
In preparation for service, set up the Prophet as follows:
1. Connect mono phone-plug between back panel AUDIO OUT jack and power amplifier.
2. Check back panel 115/230 line voltage selector.
3: Check that back panel power switch is off.
I
4. Connect power cord to properly-grounded outlet.
5. Switch power on. The power switch should light. TUNE switch on control panel will initially light.
After ten seconds, PRESET mode and BANK-PROGRAM 1-1 "comes up." If not, check fuse:
115V— 3/4A SLO BLO: 230V-1/2A SLO BLO.
6. Center PITCH wheel and set MOD wheel to minimum.
7. To be safe, SAVE the current program file through the CASSETTE interface. (Better yet, insist owners
"back-up" before delivering the machine for service.)
6. Set back panel RECORD ENABLE/DISABLE switch to DISABLE to protect NV RAM.
9. Adjust VOLUME as required.
See Section 1 for mechanical procedures required for service. Sealent can be easily pulled off of
trimmers with needle-nose pliers. Be sure to reseal any trim setting you change. It is customary to install
sockets when replacing soldered ICs. Also note that the Prophet presets to 1-1 whenever power is
switched on. This means you may have to check the controls whenever you power up — after swinging
out PCB 4. for example.
MPORTANT! WHENEVER THE AUDIO CABLE IS DISCONNECTED, PCB 3 MUST BE GROUNDED TO
THE BACK PANEL.
4-2
D-2
4-1 OSCILLATOR A TEST
STtP MODULE CONTROL SETTING NORMAL INDICATIONS/COMMENTS
1
13
PRGMR PRST
TUNE
OSCA
OFF
ON
OSC A FREQ
10
OSC A FREQ
0-10
OSC A SYNC
OSC B KBD
ON
ON
PW
0-10
SET CONTROLS ACCORDING TO FIGURE 4-1.
WHEN DONE, PLAY HIGHEST KEY (C5) AND REMEMBER
PITCH,
HOLD SECOND C (CI) FROM BOTTOM (CO). SAME PITCH
AS STEP 2.
PITCH ADJUSTS IN SEMITONES OVER 4-OCTAVE RANGE.
CHECK THAT EACH OSC PLAYS IN TUNE OVER FULL
9-OCTAVE RANGE.
7
OSCA
FREQ
0-10
SYNC FUNCTION
8
OSCA
FREQ
4
NORMAL KEYBO
9
OSCB
KBD
OFF
10
OSCA
SYNC
OFF
11
OSCA
SAW
OFF
12
OSCA
PULSE
ON
PULSE DEGENERATES NEAR SAME EXTREME KNOB
SETTINGS FOR ALL VOICES.
RELATED TRIMS: 4-14 DAC GAIN, ADC GAIN, SEQ INTERFACE
4-16 VCO SCALE
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- * * * * • ^ A n
:.p) >:• D Q D
4
- 1
1
1
1
*
ft * • « ^ ft 4*4
^^^ '^^ ^J^:
■:*-:■ D D D D D
m^
4*4
D n D [vn
1
1
IDDDDDDD
D
■i44«t
4 * i
■: □
1
Figure 4-1
OSC A TEST PATCH
4-2 OSCILLATOR B TEST
STEP MODULE CONTROL SETTING NORMAL INDICATIONS/ COMMENTS
1
V
16
19
PRGMR PRST
— TUNE
CSC B FREQ
OSC B FREQ
OSC B KBD
OSC B FREQ
OFF
ON
10
4
OSCB
FREQ
0-10
5
OSCB
FREQ
4
6
OSCB
FINE
0-10
7
OSCB
FINE
B
OSCB
SAW
OFF
9
OSCB
TRI
ON
10
OSCB
TRI
OFF
11
OSCB
PULSE
ON
12
OSCB
PW
0-10
13
OSCB
PW
5
14
OSCB
PULSE
OFF
15
OSCB
SAW
ON
16
OSCB
LO FREQ
ON
0-5
OFF
0-10
SET CONTROLS ACCORDING TO FIGURE 4-2.
WHEN DONE, PLAY HIGHEST KEY (C5) AND REMEMBER
PITCH
HOLD SECOND C (C1( FROM BOTTOM (CO). SAME
PITCH AS STEP 2.
PITCH ADJUSTS IN SEMITONES OVER 4-OCTAVE RANGE
PITCH ADJUSTS CONTINUOUSLY OVER 1-SEMITONE
RANGE.
DULLER TIMBRE, FREE OF HARMONICS.
PULSE DEGENERATES NEAR SAME EXTREME KNOB
SETTINGS FOR ALL VOICES.
2-40 HZ, CONTROLLED BY HIGHEST KEYS (C3-C5}
.1-40 HZ, FIXED FREQ. SLIGHT VARIATION BETWEEN
VOICES.
. — -
. ■ • 4 * .
» ^ ^
nan
^ '■■ "
4 ■ «
D g D
1 T ^ *W- >^«V
1 •
Figure 4-2
OSC B TEST PATCH
■ J
■ l4»I
*1C4LA10A ril
^ n
{f: n D ■:*:■ n
A
^nVf HH1H
1 I
^ ^ r
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HClLLHH ft
^ A n
^;>: ■ □ n •:*; D
L«r^«
.^
£ui^i
P
V t
^ *• • ¥•
T ■
1 t
4 t
h a
■ ■^t^at lbHAt«*A A^PubT
■i^a«KBr
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JttkJlM
*4««-
Wl4A««
:*■ D
Tm ivhc
CAVHVTI
D D
F 1
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^^ -^^ •■:^^ ^^
AIIkCi
LVfl-
iLVi
n
D
n
n O iDDaDDDD
«<L4ftl
4iLJ£t
D
^»H
1 _' ►
D
RELATED TRIMS: 4-14 DAC GAIN, ADC GAIN, SEQ INTERFACE TRIM
4-16 VCO SCALE
4-3 MIXER AND NOISE TEST
STEP MODULE CONTROL SETTING NORMAL INDICATIONS/COMMENTS
1
PRCMR PR5T
MIX
CSC A
OFF
0-10
SET CONTROLS ACCORDING TO FIGURE 4-3.
SMOOTH LEVEL CONTROL THROUGHOUT RANGE,
VOICES STAY IN BALANCE.
MIX
4 MIX
5 MIX
6 MIX
OSCA
OSCB
OSCB
NOISE
0-10
0-10
SAME AS STEP 2
SAME AS STEP 2
V » •
P4|T-M»
,flt * ft« A f«LPiB
•;#■; •;*} n D D
tmm§ iBiuH* —
• > ■
A
n'
D
D
—
"■■"-■■
Vftllft-
1 -■ 1114 I PBftl
P«t PtkTlP
■;*} D n D D D
OKILLiTDH t -^- ^
■ D ■:*;•
4P.M * **
□
f44«lf1*E*
4 ■ 4
HCl4.LArM ■
ihBtt
4^1 A"4 d"ft
44« ■
4li «
^ A n
V; ip) I D D -i; D ■
ii44
D
UAiUk
^itM 4>fV*
a
Kill
D
4^1441
4*4
<v4i
J 1
ciiTri
* ^ *
■ {ItBhbCI fBlfl4»l BBtyB'
<»< <»» -■* I'l
I^J ■^- '';^- ""^
HtPfhCri «4«K1 blkfAl4 4CLEIU
D OIDDDDDDD
ft t
■441 1 ■ fu«i
4^4
JllftC*
a
lici
D
flnlftft
UHirTI
V4«t
D n
r4 M
4BVI II
feb4i.4#ia«.
4 ■ *
• » 4
4 ' ft
f^^ry^^m
•ICI'
4 » t
*:
WillVC
D
4-4 UNISON AND GLIDE TEST
Figure 4-3
MIXER AND NOISE TEST PATCH
STEP MODULE CONTROL SETTING NORMAL INDICATIONS/COMMENTS
1
2
3
PRGMR PRST
OSCA
OSCB
TUNE
FREQ
FREQ
OFF
ON
4
4
SET CONTROLS ACCORDING TO FIGURE 4-4.
WHEN DONE, CHECK THAT 05C A AND OSC B FREQ ARE
BOTH SET UP TWO OCTAVES (FROM 0).
5 —
6 —
A-440
MTUN
A-440
WHEEL PITCH
ON
OFF
U/D
440 REFERENCE ON
FINE-TUNE FOR ZERO-BEAT. RESET OSC A AND OSC B
FREQ IF REQUIRED.
RAISES AND LOWERS PITCH BY AT LEAST A FIFTH. OSC A
AND OSC B MUST TRACK.
6
UNI
ON
9
WHEEL
PITCH
U/D
SAME AS STEP 7
10
WHEEL
PITCH
CENTER
HOLD C5 AND P
11
GLIDE
6
MEDIUM GLIDE.
12
GLIDE
10
MINIMUM: 5 5E<
D D □ D D D D
35
P-MOD FIL ENV
36 P-MOD OSC B
37= P-MOD OSC B
38' P-MOD OSC B
10
Q
* ^ 1/
n
D
IlVI
MOD
DESCENDING RES FILT SWEEP
SIMILAR
RBlATED TRIMS: 4-17 POLY-MOD FILTER ENVELOPE VCA BALANCE
4-18 POLY-MOD OSCILLATOR B VCA BALANCE
D.2
4-9 FINAL TEST
1. Check that the back panel RECORD switch is DISABLEd.
2. Press RECORD. It should not light.
3. If necessary, load custom or factory programs through the Cassette Interface.
4. Select a program.
5. Patch SEQUENCER VOLTAGE OUTjack to FILTER CONTROL VOLTAGE IN and check for increased
brightness across entire keyboard.
6. Move connector from FILTER CONTROL VOLTAGE IN to AMPLIFIER CONTROL VOLTAGE IN.
Volume should increase as you play up from the bottom of the keyboard.
7. Move connector from AMPLIFIER CONTROL VOLTAGE IN to SEQUENCER VOLTAGE IN.
8. Patch SEQUENCER TRIGGER OUT to SEQUENCER GATE IN. Check for function and offset.
9. Remove both SEQUENCER INTERFACE cords.
10. Connect footswitch to RELEASE FOOTSWITCH jack.
11. With factory program 1-4 or similar selected, play and check for footswitch function, (Switch
RELEASE off.)
RELATED TRIMS: 4-14 DAC GAIN, ADC GAIN, AND SEQ INTERFACE
4-21 FINAL VGA BALANCE
4-22 VOICE VOLUME
4-10 POWER SUPPLY TRIM
GENERALLY, THE POWER SUPPLY SHOULD NOT BE ADJUSTED UNLESS IT HAS BEEN REPAIRED,
READJUSTMENT WILL OFFSET ALL OTA BALANCES, WHICH WILL THEN HAVE TO BE RE-TRIMMED.
1. With power off, unscrew the box and slide the top panel assembly forward as discussed in
paragraph 1-2, but do not raise to service position.
2. For component location see PP531. For schematic, see SD531.
3. Switch power on.
4. Probe +15V where marked on PCB 5 and adjust R508 to read +15.000V.
5. Probe -15 where marked on PCB 5 and adjust R501 to read -15.000V.
6. Repeat steps 4 and 5 as required. (It is probably not possible to make these settings perfect.)
I
TO TRIM, THE SUPPLY MUST BE FULLY LOADED.
AFTER REPAIR, CHECK POWER SUPPLY OUTPUT BEFORE INSTALLING, BUT DO NOT OPERATE THE
UNLOADED SUPPLY FOR LONG PERIODS WITHOUT HEAT-SINKING THE REGULATORS. NEVER
OPERATE THE SUPPLY UNDER LOAD WITHOUT HEATSINKING.
WHEN INSTALLING, BE SURE REGULATOR TABS ARE FLAT AGAINST THE HEATSINK AND THE MICA
INSULATOR IS WELL-COATED ON BOTH SIDES WITH THERMAL COMPOUND. BEFORE APPLYING
POWER, CHECK REGULATOR INSULATION FROM BACK PANEL WITH OHMETER. ALL OUTPUTS
SHOULD READ "INFINITE" RESISTANCE.
4-9
b i
4-11 PITCH WHEEL TRIM
This trim removes offset from the pitch wheel, so that when centered, R1 adds .OOOOV to the nriaster
summers. Trimming R3129 may only be required. For complete pitch-wheel alignment:
I
1. Switch power off and swingout PCB 4. (Be sure to ground PCB 3.)
2. Switch power on.
3. For component locations, see PP331. For schematic see SD334.
4. Probe P301-7 with DVM.
5. Center R3129P-WH trimmer.
6. Loosen pitch wheel set screw. For location, see Figure 1-4.
7. With your left hand, hold the pitch wheel tight by pressing the detent with your thumb while
pushing against the exposed center notch with your second finger.
8. While holding the wheel steady, adjust R1 to read +/- .05V by turning the shaft slot— rather than the
wheel.
9. Being certain the wheel is center-detented, tighten set screw.
10. Move wheel up and down and check center-detent position reads +/- .05V.
11. Trim-out residual offset with R3129.
12. Repeat steps 10 and 11 for best repeatability of .000-V reading.
4-12 MASTER SUMMER OFFSET TRIM
The A and B OFFSET trimmers remove residual wheel-mod offsets in the Master Summers.
1. Switch power off and swing-out PCB 4.
2. Switch power on.
3. For component locations see PP331. For schematic, see SD334.
4. Check that R2 MOD wheel is set to minimum.
5. Probe U368-7 by clipping to the left end of R363.
6. Toggle W-MOD FREQ A switch and adjust R339 A OFFSET for same reading (e.g. +/- mV) with
W-MOD FREQ A on and off.
I
7. Probe U368-1 by clipping on to the left end of R360.
8. Toggle W-MOD FREQ B and adjust R338 B OFFSET as in step 6.
4-13 WHEEL-MOD LFO VCA BALANCE
1. Switch power off and unmount PCB 4.
2. For component locations see PP331. For schematic, see SD334.
3. Check that W-MOD SRC MIX is set to LFO and all W-MOD DESTINATIONS and LFO SHAPEs are off
4. Probe U378-13 by clipping on to left end of R3113.
5. Trim R3141 LFO BALto read O.OOOV.
4-10
4-14 DAC GAIN, ADC GAIN, SEQ INTERFACE TRIM
This procedure actually contains four trinns which need always be performed together and in the order
given.
1. Switch power off and unmount PCB 4.
2. For component locations see PP331. For schematic, see SD332 and SD333.
3. Hit CO (lowest key).
4. Probe U348-6 at TP302 CV OUT hole and note reading (e.g., +0.093V).
5. Hit C5 (highest key).
6. Trim R333 DAC GAIN for reading in step 4 plus exactly 5.000V (e.g., +5.093V).
7. Repeat steps 3-6 until exact.
8. Check other Cs. Each should be exact (e.g., 1.093, 2.093...).
9. Set FILT CUTOFF knob to 10.
10. Probe U360-7 at TP303 FILT CV hole just above U350.
11. Trim R334 ADC GAIN to read as close to 10.000V as the 83-mV quantized voltage steps will allow.
12. Patch SEQ VOLTAGE OUT to SEQUENCER VOLTAGE IN and SEQUENCER TRIGGER OUT to SEQ
GATE IN.
13. Probe U374-1, by clipping to right end of R389.
14. Hit CO.
15. Trim R385 SEQ OFFSET reading to exactly half that read in step 4 (e.g. 0.093/2= 0.046).
16. Select a non-UNISON program. While playing monophonically, trim R386 SEQ SCALE so Voice 5
plays the same note as the other voice over the entire keyboard. (Hit key repeatedly while
trimming.).
17. Disconnect sequencer interface cables.
4
4-15 WHEEL-MOD NOISE VGA BALANCE
PCB 4 need not be removed for this trim.
1. Switch PRESET off and set up controls according to Figure 4-4.
2. Turn W-MOD SRC MIX to NOISE.
3. Switch W-MOD FREQ B on.
4. Press TUNE. When done tuning, zero-beat oscillators (Leave OSC B FINE at 0).
5. With your left hand, play a key while advancing the MOD wheel until beating is heard.
6. R3142 NOISE BALANCE is accessible through a hole on PCB 4 near U418. Trim out beats
4-11
) I
4-16 VCO SCALE TRIM
BE SURE RECORD IS DISABLED
THE RANGE OF THE TUNE SYSTEM IS LARGE ENOUGH SO IT WILL RARELY BE NECESSARY TO TRIM
VCO SCALE. IN FACT VCOS CAN USUALLY BE SUBSTITUTED WITHOUT ANY READJUSTMENT.
THEREFORE IF THE PROPHET IS BADLY OUT OF TUNE THERE IS PROBABLY A COMPONENT FAILURE.
A SCALE TRIM IS INDICATED FOR OSCILLATORS WHICH DO NOT TRACK THE PITCH WHEEL, OR
WHICH ARE DETUNED IN UNISON, ESPECIALLY WITH LONG GLIDE TIMES.
This trim uses a special microcomputer subroutine which sets up the VCOs to be scaled in the order
OSC 1A, IB, 2A, 2B, 3A, etc. The lowest key, CO, is used to tell the microcomputer to recompute the
VCO SCALE bias. One starts with OSC 1A by trimming for zero-beat with a C-reference which the
computer also provides (through the A-440 circuit), hitting CO, retrimming, hitting CO, and retrimming
and so on until no further improvement can be made. Then key DO is pressed to bring up the next
oscillator, IB, and the process repeated (trim, CO, trim, CO, etc.).
1. Locate TP301 at U324-6 (schematic SD332). Tie this to +5V (Most PCB 3s have a wire loop at the +5V
rail, left of U301-U308).
2. Press TUNE. You will now hear OSC lA's sawtooth with a reference tone in the background.
3. Trim R4294 OSC 1A SCALE for zero-beat. Hit key CO and retrim, using a good amount of
"overshoot." Repeat until the tones are in zero-beat.
4. When OSC 1A is done, hit key DO and TRIM OSC IB. Table 4-0 lists OSC SCALE trim designators.
5. Repeat step 4 for OSC 2A - 5B. If you lose track of which VCO you are supposed to be trimming,
simply run your hand along the two rows of VCOs (see Figure 1-0). You will know when you touch a
pin of the currently-tuning VCO— they are very sensitive to detuning in this way.
6. When done untie TP301 from +5V. The Prophet will enter TUNE mode, then come up to program
1-1.
Table 4-0
OSCILLATOR SCALE TRIMMERS
VCO TRIMMER
1A R4294
IB R4186
2A R4300
2B R4190
3A R4306
3B R4194
4 A R4312
4B R4198
5A R4318
5B R4203
4-12
D.2
4-17 POLY-MOD FILTER ENVELOPE VCA BALANCE
1. Switch PRESET off and set controls according; to Figure 4-8.
2. To trim Voice 1, first turn P-MOD FILT ENV to 10
3. Probe U422-13 by clipping to right end of R4108.
4. With no keys hit, trim R494 for .OOOV.
5. Trim Voices 2 - 5 in the same way, referring to Table 4-1.
Table 4-1
POLY-MOD FILTER ENVELOPE VCA BALANCE
VOICE
OTA
PROBE
(RIGHT END)
TRIMMER
1
2
3
4
5
U422-13
U423-13
U424-13
U425-13
U426-13
R4108
R4109
R4118
R4119
R4128
R494
R496
R498
R4100
R4102
4-18 POLY-MOD OSCILLATOR B VCA BALANCE
1. Switch PRESET off and set controls according to Figure 4-8.
2. Turn P-MOD DSC B to 10.
3. Probe U428-13 by clipping to right end of R4108.
4. With no keys hit, trim R4138 for .OOOV.
5. Trim Voices 2 - 5 in the same way^ referring to Table 4-2.
Table 4-2
POLY MOD OSC B VCA BALANCE
VOICE
OTA
PROBE
(RIGHT END)
TRIMMER
1
2
3
4
5
U 428- 13
U428-12
U429-13
U429-12
U430-13
R4108
R4109
R4118
R4119
R4128
R4138
R4139
R4140
R4141
R4142
D.2
4-13
4-19 FILTER ENVELOPE AMOUNT VCA BALANCE
1. Switch PRESET off and set controls according to Figure 4-8,
2. Switch FILTER KEYBOARD off.
3. Probe TP303 FILT CV at hole just above U350 and adjust FILT CTF knob to read approximately 5.75V.
4. Probe U433-7 VOICE 1 FILT FREQ SMR by clipping to the right end of R4145.
5. Note reading (e.g., .063V), then turn FILT ENV AMTto 10. Trim R495 for same reading as with FILT
ENVAMT knob set too.
6. Trim Voices 2 - 5 in the same way, referring to Table 4-3.
Table 4-3
FILTER ENVELOPE AMOUNT VCA BALANCE
VOICE
OTA
1
2
3
4
5
U433-7
U434-14
U434-1
U434-7
U434-8
PROBE
R4145
R4146
R4149
R4154
R4157
TRIMMER
R495
R497
R499
R4101
R4103
4-20 FILTER TUNING
NUit: 11 Rev 3.0 Software level is V.8.1, (original) and VCO SCALE TRIM has been
performed, switch power off then back on to reset the A-*«0 port (otherwSe thC
reference will be left tuned to "C"). If V.8.2 is installed, powe^reset wm ^^^
rout?n?'^ '^ '""'"^ '^'' '' automatically reset when exiting SCALE TRIM
A scope Is required for this trim.
Note that there is no computer-correction of filter tuning as there is for the oscillators, so the filters will
never track as well as the oscillators. There Is also no temperature compensation, so the filters will always
drift a certain amount. For this reason, filter tuning can degrade as soon as five minutes after tuning The
filters are gam-matched, with the set code written on PCB 4 just above U469 (e.g. 3.60 - 3.64), Include this
set code when ordering replacement filters.
1. Switch PRESET off and set controls according to Figure 4-5.
2. Switch UNISON on.
I
3. Probe TP303 FILT CV at hole just above U350 and adjust FILT CTF knob to read as close to 2 OOOV as
the quantized voltage steps will allow.
4. Switch A-440 on.
left end of R4498.
440
6. Probe U474-7 FILT output buffer by clipping on to left end of R4500.
7. Alternately play A3 and A4 (highest A) while tuning R4501 INIT FREQ (OFFSET) and R4133 FILT
SCALE for 440- and 880-Hz. The two trimmers Interact, so repeat until no improvement is oossible
See Waveform 4-0.
8. Trim Voices 2 - 5 in the same way, referring to Table 4-4.
4-14
D.2
r J
440-H2
REFERENCE
FILTER IN
RESONANCE
(A3 HELD)
V = .IV/div
H = 5 ms/div
Waveform 4-0
FILTER TUNING
TaWe 4-4
FILTFR TUNING TRIMMERS
VOICE
FILT BUFFER
PROBE
INIT FREQ
SCALI
1
U 474-1
R4500-R GHTEND
K4501
R4133
2
U475-1
R4506-LEFTEND
R4504
R4134
3
U475-7
R4508-RIGHT END
R4509
R4135
4
U 476-1
R4514-LEFT END
R4512
R4136
5
U476-7
R4516-RIGHTEND
R4517
R4137
D.2
4-15
4-21 FINAL VGA BAL
1. Switch PRESET off and set controls according to Figure 4-8.
2. Turn MIX OSC A to 0.
3. Switch FILTKBD off.
4. Switch UNISON on.
5. Tie any key on by clipping J-wire to bus bar.
6. Referring to Table 4-5, turn down Voice 2 - 5 volumes with trimmers listed.
7. Check that R4529 is set for maximum Voice 1 volume.
8. Probe U480-5 at left end of R4565-569.
9. Trim R4520 for .000-V reading.
10. Turn Voice 1 volume all the way down.
11. Turn Voice 2 Volume up fully, and trim in the same way.
12. Repeat for Voices 3 - 5.
13. Untie key.
Table 4-5
FINAL VGA BAL
VOIGE VOLUME FINAL VGA BAL
1 R4529 R4520
2 R4528 R4521
3 R4527 R4522
4 R4526 R4523
5 R4525 R4524
4-22 VOIGE VOLUME
1. Switch PRESET off and set controls according to Figure 4-1 or faaory program 1-8.
2. Adjust OSC A FREQ to 5.
3. With scope, probe U480-7 at right end of R4564.
4. Check that all Voice Volume trimmers are set for maximum volume {see Table 4-5).
5. Play polyphonically and measure each voice level on scope. (To identify the voices, touch the OSC
As.).
6. Turn down louder voices to volume of the softest voice.
b.
4-16
r J
SECTION 5
PARTS
5-0 CHASSIS
5-2 PCB 2
NOTE. FOR ITEM DESCRIPTIONS
SEE PARAGRAPH 5-6,
BILL OF MATERIALS
DESIGNATOR
Fl
ITEM NO
E-05 1
C201-04
C205
D201-23
DS201-22
DS224
C-045
C-031
D-005
SEE S201-22
L-005
J 1/2
J 3
J4-10
Jll
J12
J13
J14
PI
Rl/2
SI
S2
S3
Al
Tl
J-001
J-014
J-001
J-029/P
J-043/P
007 (
028
■022
.1-007 (SEE SAD
.I-044/P-022
E-037
R-207
S-025
S-032
S-03S
-027
E-04S
J201
P201
P202
Q201
QA20 1
R201/02
R203
R204/05
R20d.
R207/08
R209
R210/11
R212
R213-17
R213-20
J-007
P-025, P-032
P-040
T-002
T-011
R-221
R-008
R-221
R-008
R-221
R-008
R-221
R-OlO
R-221
R-OlO
W2
E-080
E-078
RA201
RA202
R-300
R-301
5-1 PCB 1
S201-20
S-02S
S-029
S-030
S-031
ClOl
DlOl-14
C-04
D-005
DSlOl-14
SEE S
RlOl-13
R-221
SlOl
S102-12
S113
S114
S-028
S-029
S-028
S-029
U201-03
U204/05
U206
U207/08
U209/10
U211
U212
W201
I
I
I
I
211
227
_o
27
1-216
1-228
I-21S
E-071
*i
5-1
5-3 PCB 3
BT301
E-040
L-\:!Oi
0-U45
C302
0-031
C303
0-021
C304-15
0-045
C:316
C-014
C317
0-031
0318-20
0-045
C321
0-036
C322/23
0-045
C324
C-040
r- O 9 b; / ■-:. /.
0-045
C327-4S
0-012
C349/50
0-045
C351
0-046
C352
0-045
C353/54
0-036
C355/56
0-021
C357
0-045
C35S
0-047
0359
0-012
C360
0-021
C36 1
0-014
0362-64
0-012
C365-6?
0-045
0370
0-031
0371
0-045
0372
0-012
0373/74
0-045
0375
0-012
0376
0-041
0377-Sl
0-045
0382
0-041
0383
0-045
0384/85
0-012
0386
0-045
D301-3
D-005
D304
D-OOl
D305-19
D-005
J301
J- 031,
J302
J-042
P30 1
P-027
P302
P-029
P303
P-030
P304
P-013
Q301-0S
T-003
Q309
T-008
R301
R-025
R302
R-0 1 4
R303
R-022
R304
R-0 10
R305/06
R- 1 1
R307
R-025
R303
R-0 11
R309
R-0 10
R310
R-004
R3 11-1 3
R-025
R314
R-0 1 1
R315
R-025
R316
R-0 10
R317
R-0 11
R3 1 8
R-025
R319
R-047
R320
R-062
R321
R-064
R322
R-054
R323
R-040
R324
R-025
R325
R-0 1
R326
R-031
R327
R-022
R328
R-054
R329
R-110
R330
R-1&2
R331
R-OOS
R332
R-067
r\ooo
R-2 12
R334
R-2 11
R335
R-163
R336
R-144
R337
R-107
R338
R-2 1 7
R339
R-2 18
R340
R-107
R341
R-108
R342/43
R-115
R344
R-144
R34I5
R-068
R346
R-045
R347-49
R-025
R350
R-167
R351
R-025
R352
R-110
R353
R-0 12
R354/55
R-llON
R356
R-165
R357
R-llON
R358-60
R-llOA
R361/62
R-045
R363-5
R-llOB
R366
R-142
R367
R-0 14
5-2
I i
R363/69
R-162
R370
R-014
R371
R-142
R372
R-llON
R373
R-025
R374
R-110
R375
R-OOS
R376
R-ll/i.
R377
R-121
r;c";i'7'0
R-110
R379
R-llOA
R3S0/S1
R-012
R382/3
R-llOB
R334
R-008
C* C' C' c^
R-217
R336
R-218
R387
R-110
R3S3/99
R-008
R390
R-029
R391
R-113
no y^
R-161
R393
R-025
R394
R-066
R395
R-OIS
R396
R-006
R397/9S
R-014
R399
R-119
R 3 1
R-110
R3101
R-025
R3102
R-110
R3103/104
R-128
R3105
R-122
R3106
■
R-011
R3107
R-113
R310S
R-142
R3109
R-063
R3110
R-012
R3111
R-OlO
R3112
R-02S
R3113
R-012
R3114/n5
R-036
R3116
R-038
R3J.17/11S
R-029
R311'"'
R-015
R3i20
R-004
R3121/122
R-011
R3 123/ 124
R-025
R3 1 25
R-035
R3126
R-0 1 6
R3127/S
R-012
R3129
R-21S
R3130
R-015
R3131
R-065
R3132
R-026
A
R3133
R3134
R3135
R3136
R3137
R313S
R3139
R3140
R3141/142
R3143
R3144
R3145
R3146
R3147/14S
R3 149 /ISO
R3151
R3152
R3153
U301-S
U309
US' 1
LI311
U312
U3 1 3
LI3 1 4
U315
U316/17
U31S/19
IJ320
U321
U322
U323/24
U325
U326
U327/28
U329
U330
U331
U332-40
IJ341/42
U343-45
U346
U347
U34S
U349-54
U355-57
U353-64
LI365
IJ366-68
11369-71
U372
IJ373
R-065
R-006
R-123
R-159
R- 1 39
R-116
R-006
R-004
R-217
R-004
R-026
R-064
R-012
R-025
R-029
R-030
R-004
R-011
1-226
1-230
I-lOl
1-025
Z-<??5 O.V.8.2.
'ZrW 2.V.S.2.
I'-414
1-033
1-117
I-lOl
1-102
1-109
1-216
I "008
I "503
1-237
1-229
1-205
1-209
I -228
1-205
1-209
1-502
1-323
1-305
1-312
1-211
1-312
1-302
1-313
1-206
1-404
1-312
D.2
5-3
I ]
U374
U375
U376
U377
U37S
U379
U380
U381
W301
-313
-315
"321
-206
-322
-233
-312
-322
E-079
5-4 PCB 4
C401-02
C-045
C403-09
C-040
C:410
C-045
C4H-1S
C:-040
C419/20
C-045
C421/22
C-03&
C423
C-031
C424
C-043
C425
C-012
C426
C-014
C427
C-043
C428
C-012
C429
C-014
C430
C-043
C431
C-012
C432
C-014
C433
C-043
C434
C-012
C435
C-014
C436
C-043
C437
C-012
C438
C-014
C439/40
C-045
C441
C-043
C442
C-014
0443
C-043
C444
C-014
C445
p-043
C446
C-b45
0447
C-014
C44S
C-043
C449
C-014
C450
C-043
C451
C-045
C452
C-014
C453-57
C-045
C45S
C-04-5
C459-63
C-045
C464-66
C-008
C467
C-045
C46S
C-008
C469
C-045
C470
C-OOS
C471-80
C-045
C481
C-039
C4S2
C-045
C483
C-039
C4S4
C-045
C4S5
C-039
C486
C-045
C487
C-039
C4SS
C-045
C489
C-039
C490
C-045
C491-100
C-012
C4101-104
C-045
C4 1 05
C-021
C4 106-1 10
C-005
C4111-118
C-045
C4119
C-039
C4120
C-045
C4121
C-039
C4122
C-045
C4123
C-039
C4124
C-045
C4125
C-039
C4126
C-045
C4127
C-039
C4128
C-045
C4 129- 138
C-012
C4 139- 144
C-045
C4 145- 149
C-044
C4 150- 159
C-03S
C4 160- 163
C-045
C4 164- 168
C-021
C4 169- 178
C-03S
C41 79- 183
C-045
C4184
C-018
C4185-183
C--045
C4189
C-042
D401-1S
D-005
P401
P-013
P402
P-044
Q401-11
T-003
R402-04
R-168
R405-06
R-141
R407-09
R-169
R410-15
R-145
R41S/19
R-145
R423-25
R-14S
5^
D.2
R426
R-141
R427-29
R-169
R430~32
R-16S
R433
R-141
R439-43
R-145
R444
R-02S
R445
R-040
R446
R-057
R447
R-040
R443/49
R-141
R450
R-147
R451
R-149
R452
R-147
R453
R-i71
R454
R-02S
R455
R-040
R456
R-057
R457
R-040
R453/59
R-041
R460
R-147
R461
R-149
R462
R-147
R463
R-171
R464
R-023
R465
R-040
R46^".
R-057
R467
R-040
R46S/69
R-141
R470
R-147
R471
R-149
R472
R-147
R473
R-171
R474
R-02S
R475
R-040
R476
R-057
R477
R-040
R47S/79
R-141
R4S0
R-147
R4S1
R-149
R4S2
R-147
R483
R-171
R4S4
R-02S
R4S5
R-040
R4S6
R-057
R4S7
R-040
R48S/89
R-141
R490
R-147
R491
R-149
R492
R-147
R493
R-171
R494-103
R-217
R4104
R-030
R4105/06
R-004
R4107
R-140
R4 108/09
R-016
R4110
R-140
R4111/12
R-004
R41 13/14
R-030
R4115/116
R-004
R4117
R-140
^'^^ 18/119
R-016
R4120
R-140
R4121/122
R-004
R4 123/ 124
R-030
R4125/126
R-004
R4127
R-140
R412S
R-016
R4129
R-012
R4130
R-011
R4131
R-026
R4132
R-012
R4 133- 137
R-ZjdZ
R41 38- 142
R-217
R4 143/ 144
R-110
R4 145 /1 46
R-151
R4147/143
R-110
R4149
R-151
R4 150- 153
R- 1 1
R4154
R-151
R4155/156
R-110
R4157
R-151
R4158
R-029
R4159
R-025
R4160
R-110
R4161/162
R-167
R4 163- 166
R-110
R4167
R-167
R4 1 68
R-012
R4169
R-030
R4170/171
R-167
R4172-176
R-113
R4177-181
R-114
R41S2
R-008
R41S3
R-029
R41S4
R-146
R4185
R-142
R41S6
R-21i
R41S7
R-012
R41 88
R-146
R41S9
R-142
R4190
R-211
R4191
R-012
R4192
R-146
R4193
R-142
R4194
R-211
R4195
R-012
R4196
R-146
R4197
R-142
5-5
> 1
R419S
R4199
R4200
R4201
R4202
R4203
R4204
R 4205/ 2 06
R4207
R4203
R4209
R4210
R42 1 1
R4212/213
R4214
R4215
R4216
R4217
R421S
R42 19/220
R422J.
R4222
R4223
R4224
R4225
R4226/227
R4228
R4229
R4230
R4231
R4232
R4233/234
R4235
R4236
R4237
R4238
R4239/240
R424 1-245
R4246/247
R424S
R4249-251
R4252/253
R4254/255
R4256/257
R4258^261
R4262/263
R4264
R4265/266
R4267
R426S
R4269/270
R427 1-274
R4275/276
R4277
R4278
R-211
R-012
R-146
R-142
R-012
R-211
R-170
R-110
R-006
R-139
R-116
R-006
R-170
R-110
R-006
R-139
R-116
R-006
R- 1 70
R-110
R-006
R-139
R-116
R-006
R-170
R- 1 1
R-006
R-139
R-n6
R-006
R-170
R-110
R-006
R-139
R-116
R-006
R-026
R-041
R-026
R-041
R-026
R-029
R-025
R-029
R-025
R-029
R-026
R-041
R-026
R-041
R-029
R-025
R-029
R-026
R-041
R4279
R4280-289
R4290
R4291
R4292
R4293
R4294
R4295
R4296
R4297
R4298
R4299
R4300
R4301
R4302
R4303
R4304
R4305
R4306
R4307
R430S
R4309
R4310
R4311
R4312
R4313
R4314
R4315
R4316
R4317
R431S
R4319
R4320
R432 1/322
R4323
R4324
R4325
R4326
R4327
R4328/329
R4330
R4331
R4332
R4333
R4334
R4335/336
R4337
R433S
R4339
R4340
R4341
R4342/343
R4344
R4345
R4346
R4347
R-108
R-041
R-107
R-012
R-146
R-142
R-211
R-012
R-018
R-012
R-146
R-142
-211
•012
R
R
R
R
01*^'
5-6
o
1 2
R-146
R- 1 42
R-211
R-012
R-018
R-012
R-146
R-142
R-211
R-012
R-OIS
R-012
R-146
R-142
R-211
R-012
R-OIS
R-110
R-006
R-170
R-139
R-116
R-006
R-110
R-006
R-170
R-139
R-116
R-006
R-110
R-006
R-170
R-139
R-116
,R-006
R-110
R-006
R-170
R-139
R-116
I I
R434S
R-006
R4349/
350
R-110
R4351
R-006
R4352
R-170
R4353
R-139
R4354
R-116
R4355
R-006
R4356
R-OOS
R4357"-
36 1
R-115
R4362
R-025
R4363
R-004
R4364
R-041
R4365
R-004
R4366
R-026
R4367
R-025
R4363/
369
R-036
R4370-
372
R-004
R4373
R-041
R4374
R-004
R4375
R-026
R4376
R-025
R4377/
'-•TO
R-036
R4379-
331
R-004
R43S2
R-041
R43S3
R-004
R43S4
R-026
R43S5
R-025
R43S6/
387
R-036
R4333"
390
R-004
R4391
R"041
R4392
R--004
R4393
■
R-026
R4394
R-025
R4395/
396
R-036
R4397-
399
R-004
R4400
R-041
R4401
R-004
R4402
R-026
R4403
R-025
R4404/405
R-036
R4406/407
R-004
R4408
J
R-058
R4409
R-024
R4410/411
R-025
R4412
R-058
R4413
R-024
R4414
R-026
R4415
R-031
R4416
R-056
R4417
R-05S
R441S
R-024
R44 19/420
R-025
R4421
R-05S
R4422
■
R-024
R4423
R-026
R4424
R-031
R4425
R-056
R4426
R-058
R4427
R-024
R4423/429
R-025
R4430
R-053
R4431
R-024
R4432
R-026
R4433
R-031
R4434
R-056
R4435
R-05S
R4436
R-024
R4437/43S
R-025
R4439
R-05S
R4440
R-024
R4441
R-026
R4442
R-031
R4443
R-056
R4444
R-05S
R4445
R-024
R4446/447
R-025
R4448
R-05S
R4449
R-024
R4450
R-026
R4451
R-031
R4452
R-056
R4453
R-024
R4454
R-058
R4455/456
R-025
R4457
R-009
R445S
R-152
R4459
R-139
R4460
R-021
R4461
R-024
R4462
R-05S
R4463/464
R-025
R4465
R-009
R4466
R--152
R4467
R-139
R4468
R-021
R4469
R-024
R4470
R-05S
R447 1/472
R-025
R4473
R-009
R4474
R-152
R4475
R-139
R4476
R-021
R4477
R-024
R447S
R-058
R4479/480
R-025
R44S1
R-009
R44S2
R-152
R4483
R-139
R44S4
R-021
R4485
R-024
R44S6
R-058
5-7
» I
5-8
R44S7/488
R-025
R44S9
R-009
R4490
R-152
R4491
R-139
R4492
R-021
R4493-497
R-036
R4498
R-0 12
R4499
R-025
R4500
R-05S
R4501
R-212
R4502/503
R-130
R4=-<04
R~212
R4505
R-025
R4506
R-05S
R4507
R-025
R450S
R-053
R4509
R-212
R4510/511
R-130
R4512
R-2i2
R4513
R-025
R4514
R-05S
R4515
R-025
R4516
R-058
R4517
R-212
R4513
R-130
R4519
R-0 15
R4520-524
R-217
R4525-529
R-225
R4530-534
R-036
R4535
R-025
R4536-540
R-026
R4541/542
R-0 11
R4543
R-025
R4544
R-008
R4545
R-042
R4546
R-021
R4547/54S
R-0 15
R4549
R-021
R4 550/ 551
R-0 15
R4552
R-021
R4553/554
R-0 15
R4=l'=if=;
R-021
R4556/557
R-0 1 5
R455S
R-021
R4559/560
R-0 15
R4561
R-021
R45&2
R-0 15
R4563/564
R-0 14
R4565-569
R-0 17
U401-04
1-312
U405/06
1-211
U407-10
1-312
U411
1-411
U4 12-21
U422-26
U427
U428-30
11431-34
U43S
U436-3S
U439/40
U441
U446
U451
U454
U459
U464
U469
U474
IJ477
U478
U4S0
U4S1
45
50
53
53
63
68
73
76
79
W401
W402
-319
-322A
-315
-233B
-313
-301
-206
-211
-312
-206
-312
-321
-206
-322B
-320
-312
-321
-322C
-312
_Q
17
E-079
E-079
5-5 PCB 5
C50 1
C-036
C502
C-021
C503
C-02S
C504
C:-025
C505-08
C-021
C:509
C-036
C510
C-028
D501-04
D-004
D505
D-OOl
D506
D-004
R501
R-219
R502
R- 1 58
R503
R-125
R504
R-OOS
R505
R-156
R506
R-043
R507
R-157
R508
R-219
U50 1
1-420
U502
1-410
U503
1-411
U504
1-409
U505
1-412
•r
' F
I H I
I 4
5-6 BILL OF MATERIALS (TOTAL ITEMS)
LINE
ITEM
DESCRIPTION
QTY
000
C-005
002
C-008
004
C-012
006
C:-014
007
C-018
008
C-021
010
C-025
012
C-028
014
C-031
016
C-036
018
C-033
020
C:-039
022
C-040
024
C-041
026
C-042
028
C-043
030
C-044
032
C-045
034
C-046
036
C-047
03S
040
D-OOl
042
D-004
044
D-005
046
048
E-OOl
050
E-002
052
E-003
054
E-017
056
E-0 1 8
058
E-037
060
E-040
062
E-044
064
E-045
066
E-048
068
E-051
070
E-053
072
E-054
074
E-055
076
E-056
078
E-057
080
E-058
082
E-059
084
E-060
086
E-061
088
E-062
090
E-063
092
E-064
094
E-065
200P 50V DISC CAP
.001 50V MYLAR 107. CAP
.OIUF MYLAR 50V
.02 50V MYLAR
.22 35V TANTALUM
2.2 TANTALUM 25V 207. CAP
2200 25V ELECTROLYTIC CAP
6300 25V CAP
10 lOV TANTALUM CAP
lOU 25V TANT
150PF POLY 57.
1000PF-, POLY
10,000PF<.01) POLY 50V 57.
. lUF MYLAR 50V 57.
2.2UF NON-POLAR 25V
.039UF MYLAR 57. 50V
lOUF TANT 3V
. lUF 50V DECOUPLER
.0056 MYLAR lOOV
120 PF 107. DISC (WAS 75PF
1N4002 lOOV 1
MR501<1N5401)
1N914
AMP DIODE
lOOV SAMP
IS AUIG RED
18 AUG BLUE
BLACK MIRE
SQUARE FUSE HOLDER BLACK
SQUARE FUSE HOLDER CAP RD
PWRCORD BELDEN 17238 3C 8'
2.9V BATTERY LITHIUM
AWG 22 ORANGE — BELDN 8524
BLACK COAX 8216-BELDEN
CT TRANSFORMER 5V3
3\4 AMP SLO-BLO FUSE
22 AWG STRANDED YELLOW
22 AWG STRANDED BLACK
22 AWG STRANDED GREY
22 AWG STRANDED WHITE
22 AWG STRANDED BROWN
22 AWG STRANDED VIOLET
22 AWG STRANDED RED
22 AWG STRANDED TAN
22 AWG STRANDED LGHT BLUE
22 AWG STRANDED GREEN
IS AWG WHITE
18 AWG ORANGE
18 AWG YELLOW
5
5
54
12
1
1
5
7
20
10
16
2
1
10
5
116
1
1
2
5
73
2
4
5
1
1
1
1
4
3
1
1
2
2
2
2
2
2
4
2
4
4
2
1
2
5-9
k L
096
E-066
098
E-071
100
E-078
102
E-079
104
E-OSO
106
108
I -008
110
1-025
112
1-027
114
1-033
116
I-lOl
118
1-102
120
1-109
122
1-117
124
1-205
126
1-206
128
1-209
130
1-211
132
1-216
134
1-218
136
1-226
138
1-227
140
1-228
142
1-229
144
1-230
146
1-233
148
1-235
150
1-237
152
1-301
154
1-302
156
1-305
158
1-312
160
1-313
162
1-315
164
1-317
166
1-319
168
1-320
170
1-321
172
1-322
174
1-323
176
1-404
178
1-409
180
1-410
182
1-411
184
1-412
186
1-414
188
1-420
190
1-502
192
1-503
194
196
J-001
198
J-007
200
J-014
202
J-016
18 AWG WHITE WNORANGE STR
40 PIN RIBBON CABLE
RIB CBL 6.0C0NB MLX 2.75"
BUS BAR
RIBBON CABLE, 16-PIN
7474 IC TTL DUAL FLIPFLT
2-80 CPU
2708 1024X8 EPROM
2114 1024X4 STATIC RAM
74LS00 IC LSTTL QUAD NAND
74LS02 IC LSTTL QUAD NOR
74LS74 LSTTL DUALFLIPFLOP
74LS138 3-8 DECODER
4013 CMOS DUAL FLIPFLOP
4016
4049
4051
4503
4514
6508
4042
4174
4556
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
QD ANALOG SWTCH
HEX INVTR\DRIVR
8- IN AN MULTPLX
HEX 3STATE BUFF
4-16 DE-MULTPLX
IK XI L PWR RAM
QUAD LATCH
HEX LATCH
DUAL 2-4 DEMUX
74C02 QUAD NOR
14066B QUAD ANALOG SWITCH
MC1413(2003)
14504 HEX LEVEL SHIFTER
311 PRECISION COMPARATOR
339 QUAD COMPARATOR
LM741CN OP AMP
TL082 DUAL BIFET OP AMP
LM348 QUAD-741 OP AMP
MM5837N NOISE SOURCE
NE5534, SIGNETICS
3310 ENV OEN
3320 VCF
3340 VCO
3280 DUAL OP TRNSCND AMP
LF356 FET OP AMP
78M05CT
MA78M12UC +12 1\2 AMP REG
MA7805VC +5VlAMP(LM340T-5
LM7905/79M05 -5V lA REG
LM317T +15V lAMP REG
8253 TIMER
LM337T NEG AD J REG 1-27V
16 BIT DAC 71-CSB-I
X0-12C, 5-MHZ, DALE
1
1
1
3
1
1
1
3
1
1
3
17
4
10
4
1
8
4
10
1
1
1
1
2
1
1
1
30
8
2
1
10
5
11
18
1
1
1
1
2
1
1
1
1
1
1/4" PHONE, SHORTING
16-PIN DIP SOCKET
SWITCHCRAFT 113 MONO JACK
40 PIN DIP SOCKET
9
46
1
1
5-10
I i
204
J-017
206
J-028
208
J-029
210
J-031
212
J-041
214
J-042
215
J-043
216
J-044
218
220
L-005
■-lOO
^^jL
224
ri-002
226
M-005
228
ri-009
230
M-016
ri"02o
234
M-025
236
M-027
233
M-031
240
M-035
242
M-039
244
M-054
246
li-056
248
M-068
250
M-069
252
M-070
254
M-071
256
ri-073
258
M-079
260
M-080
262
M-081
264
M--082
266
M-085
268
M-088
270
M-089
272
M-090
274
M-091
276
M-092
278
M-093
280
M-095
282
M-097
284
M-107
286
M-111
288
M-112
290
M-117
292
M-119
294
M-124
296
M-182
298
M-140
300
M-150
302
M-151
304
M-152
306
M-154
308
ri-i55
24 PIN DIP SOCKET
3 PIN JACK
20 PIN JACK
10 PIN MOLEX JACK GOLD
18-PIN DIP SOCKET (BURNDY
6-PIN MOLEX JACK GOLD
7-PIN MOLEX HOUSING
2-PIN MOLEX HOUSNG
6-3
DET
CLIP
CLIP
DIS 6740 DL DIG .56 MAN
RED PLEXIGLASS 11\2"X2"
PLASTIC TIES
LARGE STRAIN RELIEF
LARGE RUBBER FEET
TERM RING LUGS 12GAUGE#10
5\16"BLK FLATHEAD PHILLIP
SHEETMETAL SCREWS
6-32 LOCKWASHERS EX TOOTH
32 NUTS SMALL
700/SCI LABEL, LONG
SYNTHESIZER WOOD BOX
SYNTH FRONT COSMETC STRIP
STICKER SMALL "PROPHET-S"
STICKER SMALL SCI
1\2 6-32 SET SCREWS
1\4"6"32 PANSLTSCREW MS2P
30-1 TENSION CLIP-PW
KNOB BLCK TOP SPRING
KNOB SILVR TOP SPRNG
THERMALLOY 43-66-2AP
CAP HOLDER TH25 MALLORY
CLAMP FOR RIB CBLE CFCC-4
DBL CBLE CLMP RICHCO UC-2
8-32 3\8" PANSLT MS SCREW
XLUTS 6-32 LARGE
NUTS 8-32 HEX
#8 LOCKWSHR INTRNL TOOTH
SCREW 1\2" 8-32 PANHD SLT
TERMINL RING RED PV18-10R
1000 SERIAL # LABELS
NYLN SHLDRWSHR - REG #411
1 1\4STAND0FF 1\40D 6-32
3\4 STANDOFF 1\40D 6-
FOAM RBBR1"W 1\16T
6\32X5\8BLK PHLLPS
HEATS INK
3/8" STARWASHER
TIE
SHRINK TUBING 3/16"
SHRINK TUBING 1/4"
POT NUT
#3 FIBER WASHERS
1/2" STANDOFF SMITH8343
W\PSA1
M\S
5
1
1
1
7
2
1
1
1
1
2
1
4
1
4
36
7
11
1
1
1
1
1
2
9
1
24
2
3
2
1
4
2
4
2
6
6
6
1
1
3
4
2
5
4
1
10
2
1
1
26
4
6
5-11
I J
310
M-156
312
M-157
314
M-158
316
M-159
318
M-160
320
M--161
322
M-200
324
M-201
326
M-202
323
M-203
330
M-204
332
M-205
334
M-206
336
M-211
338
M-212
340
M-213
342
M-214
344
ri-215
346
348
P-013
349
P-022
350
P-025
352
P-027
353
P-028
354
P-029
356
P-030
358
P-031
360
P-032
362
P-040
364
P-044
366
368
Q-OOl
370
Q-005
372
Q-009
374
Q-014
376
Q-036
378
Q-017
380
382
R-004
384
R-006
386
R-008
388
R-009
390
R-OlO
392
R-011
394
R-012
396
R-014
398
R-015
400
R-016
402
R-017
404
R-018
406
R-021
408
R-022
410
R--024
412
R-025
3/8" X 6-32 PHLP CNTRSNK
4-40 X 1/4" BLCK PNHDSLT
8-32 X 1/2" BLK PANHDSLT
3/16" WIDE FOAM TAPE
MEDIUM "PROPHET-5" STCKR
8-32 X 3/4" PNHDSLT
SYNTH WHEEL, 5V3
CONTROL PANEL, 5V3
WHEEL B0X,5V3
BOTTOM PANEL, 5V3
WHEEL BRACKET, 5V3
KEYBOARD BKT,5V3
HE ATS INK, BACK PNL
PCB1,5V3
PCB2,5V3
PCB3,5V3
PCB4,5V3
PCB5,5V3
60 PIN HEADER AP
PINS GOLD
lOPIN PLUG GOLD
7-PIN POLAR. RT- ANGLE
GOLD SOCKETS CONTACT
20 PIN PLUG GOLD
3 PIN PLUG GOLD
POLARIZING PINS
5 PIN PLUG
6 PIN MOLEX ST
2-PIN MOLEX GOLD PLUG
PACKING TAPE
1" GLASS TAPE
28X50X.002 BAGS M 1000
WARRANTY CARD
1000.3 OP MAN (CMIOOOC)
1000 PACKING BOX
330 OHM
1\4W 5'/i
470 OHM 1\4W 57. RESISTOR
IK 1\4W 57. RESISTOR
1.5K 1\4W 57. RESISTOR
2K 1\4W 57. RESISTOR
4.7K 1/4W 57.
lOK 1\4W 57. RESISTOR
57. CARBON FILM
57. RESISTOR
57. RESISTOR
57. RESISTOR
57. RESISTOR
57. RESISTOR
15K
20K
30K
39K
47K
68K
1\4W
1\4W
1\4W
1\4W
1\4W
1\4W
75K
91K
1\4W
1\4W
57. RESISTOR
57. RESISTOR
3
4
1
1
2
2
1
1
1
2
1
1
1
1
1
1
1
2
8
1
1
23
1
1
2
1
2
1
1
1
1
1
1
1
35
lOOK 1\4W 57. RESISTOR
12
5
9
12
27
7
14
6
5
6
11
2
15
63
5-12
414
416
418
420
422
424
426
428
430
432
434
436
438
440
444
446
447
448
452
454
456
458
460
462
464
466
468
470
472
473
474
475
476
478
479
480
482
484
486
487
488
490
492
494
495
496
498
502
504
506
510
512
513
516
R-026
R-028
R-029
R-030
R-031
R-035
R"036
R-038
R-040
R-041
R-042
R-043
R-045
R--047
R-054
R-056
R-057
R-058
R-062
R-063
R-064
R-065
R-066
R-067
R-068
R-107
R-IOS
R-110
R-113
R-114
R-115
R-116
R-119
R-121
R-122
R-123
R-125
R-128
R-130
R-139
R-140
R-141
R-142
R-144
R-145
R-146
R-147
R-149
R-151
R-152
R-156
R-157
R-158
R-159
200K 1\4W 57. RESISTOR
470K 1\4W 57. RESISTOR
IM 1\4W 57. RESISTOR
2.2M 1\4W 57. RESISTOR
3K 57. RESISTOR
2.7K RESISTOR
RESISTOR
RESISTOR
57.
RESISTOR
560 OHM RESISTOR
47 OHM 57. RESISTOR
lOM 57. RESISTOR
10 OHM 57. 1\4W RESISTOR
33K, 57.
3.3K
3.2K
22K,
150K
51K,57.
120K,
57.
240K,
57.
5.6K,
57.
910,
57.
5. IK,
57.
160K,
57.
300K,
57.
3.9K»
57.
100,
57.
4.99K
17.
RESISTOR
lOK 17. RESISTOR
lOOK
17. ]
L/4W
30. IK
17.
RESISTOR
54. 9K
: 17.
RESISTOR
30 IK RESISTOR 17.
2.21M 17. 1\4W RESISTOR
13. 3K 17. RESISTOR
IM7 17.
200K 1"/.
RESISTOR
4S7K IV.
RESISTOR
121, 17.
RN55D 1 2 1 OF
182K IV.
RESISTOR
249K 1%
RESISTOR
1.82K»
17.
3.32K,
17.
4.75K,
17.
5.62K,
17.
20. OK,
IX
24. 3K,
17.
26. 7K,
17.
47 . 5K ,
17.
121K. 1*/.
162K,l-yi
t
1 87K . 1 7.
243 , 1 •/,
P
2.55K,
17.
1.24K.
17.
IIOK, 17.
6
17
7
6
1
22
1
11
25
1
1
3
1
2
5
5
20
1
1
2
2
1
1
1
3
2
55
7
5
7
12
v;
2
5
16
5
14
13
2
16
10
10
5
5
5
1
1
1
1
5-13
51S
R-161
520
R--162
522
R-163
524
R-165
528
R-167
530
R-168
532
R-169
534
R-170
536
R-171
544
R-207
546
R-211
548
R-212
550
R-217
552
R-218
554
R-219
556
R-221
558
R-222
564
R-225
572
R-300
574
R-301
576
578
S-025
580
S-027
582
S-031
584
S-032
586
S-034
588
S-038
590
S-028
592
S-029
594
S-030
598
600
T-002
602
T-003
604
T-008
606
T-011
24. 9K, 17.
332, IV.
18. 2K, 17.
261K, 1%
52. 3K, 1'/.
806 , 1 7.
13. OK, 17.
357K , 1 7.
475K, 17.
JA1G0405104UA lOOK POT
5K TRIMMER ITURN TOP AD J
lOOK TRIMMER ITURN TP AD J
lOOK TRIM, ITURN TOP PIHER
lOK TRIM, ITURN TOP PIHER
200 OHM TOP AD J TRIMMER
SPECIAL lOK LIN POT
50K CERMET B0UR3386P1503
25K 1-TURN TOP AD J PIHER
39-OHM X 8 NTWK, BOURNS
22K-0HM X 15 NTWK, BOURNS
AC POWER SWITCH LIGHT RED
5-OCT KYBD 10-0-0218-1
SWITCH GREY SR
115/230 SLIDE SW 46206LFR
FOOTSWITCH
REC ENABLE \D IS SLIDE SW
BLACK LED SWITCH SRL
GREY LED SWITCH SRL
ORANGE LED SWITCH SRL
2N3904 PNP TRANSISTOR
2N4250 PNP TRANSISTOR
AD820 MATCHED PNP PAIR
3082 RCA
1
3
1
1
6
6
10
5
2
11
6
25
2
2
26
5
5
1
1
1
1
1
1
1
1
13
1
1
19
1
1
/
5-14
[ I
SECTION 6
GLOSSARY
This list covers abbreviations appearing on SCI documentation except that integrated circuits are
generally shown with the manufacturer's abbreviations. Refer to the device data sheet as required.
i
\
A
A
(a). (A)
AC
ACC
ACK
A/D
ADC
ADI
A DPT
AD5R
AH
ALU
AM
AMP
AMT
APPROX
ASSY
ATK
ATT
AUX
AVC
B
B
SAL
BANK
BCD
8FR
BLK
BLU
BRN
BT
C
C
'C
CAL
CASS
CB
CC
CCW
CHG
CKT
CLK
CLR
cm
CM
CMOS
CMP
<Kldr(*ss bus
VCO A
Ampore
analog (for power or common)
alternating current
accumulator
acknowledge
analog/digital (hybrid)
analog-to-digitat converter
adjust
adapter
attack/decay/susiain/release {ENV GEN)
address bus, high-voltage
arithmetic-logic unit
ammeter
amplifier (FIN VCA)
amount
approximate
assembly
attack
attenuation, attenuator
auxiliary
average
VCOB
bit number (LSB, MSB)
balance
bank
binary-coded-decimal
buffer
black
blue
brown
battery (designator)
capacitor (designator)
control (solid-state switch)
Centigrade
calibration, calibrator
cassette
circuit breaker (designator)
control current for OTAs
counter-clockwise
charge
circuit
clock
clear
centimeter
current mirror
complementary metal-oxide semiconductor
compensation
CNT
count
CNTR
counter
COAX
coaxial
COMM
common
COMP
computer
CONT
control
CONV
conversion, converter
CPR
comparator
CPU
central processor unit
CR
rectifier module (designator)
cs
chip select
CTF
cutoff
CTR
center
CV
control voltage
CW
clockwise
CY
carry
D
data
D
diode (designator)
(D)
digita (for power or common)
DA
diode array (designator)
DAC
digital-to-analog converter
dB
decibel
DB, DBUS
data bus
DBH
data bus, high-voltage
dc
direct current
DCOD
decoding, decoder
DET
detection, detector
Dl
data in
DIP
dual in-line plastic (package)
DIS
disable
DISCHC
discharge
DMUX
demultiplexing, demultiplexer
DO
data out
DN
data, non-volatile
DRVR
driver
DS
indicator (designator)
DSP
display
DVM
digital voltmeter
DX
switch matrix row
DY
switch matrix column
EDIT
edit
EN
enable
ENV
envelope
EOC
end-of-conversion
EOT
end-of-tape
EPROM
erasable-programmable read-only memory
EQ
equalization, equalizer
EXT
external
6-1
F
Farad
F
fuse (designator)
F
Farenheit
FDBK
feedback
FET
field -effect transistor
FF
flip-flop
FILT
filter (VCF)
FIN
final
FINE
fine
FOA
(for FACTORY USE ONLY)
FREQ
frequency
FSK
frequency-shift keying
FT
foot
FTSW
footswitch
CGATE
gate
GEN
generator
OLD
glide
GND
ground
CRN
green
H, HEX
hexadecimal (base 16)
Hz
Hertz
1
inhibit
1
input (solid state switch)
labc
amplifier bias current (3280 control)
IC
integrated circuit
IN
input
INIT
initial
INT
interrupt
INV
inversion, inverter
I/O
input/output
IRQ
interrupt request
J
jack (fema)e pins)
jSTK
joystick
K
kilo-
KBD
keyboard
L,
*
ower
LD
load
LED
light-emitting diode
LFO
ow frequency oscillator
LET
left
LIM
limit, limiter
LIN
linear
LOG
logarithmic
LSB
feast significant bit
LSI
large-scale integration
LVL
level
m
mili-
M
mega-
MAX
maximum
MEM
memory
MIN
minimum
MIX
mixer
MOD
modulation
M05
metal-oxide semiconductor
MSB
most significant bit
MSI
medium-scale integration
MSUM
master summer
MTUN
master tune
MUX
multiplexing, multiplexer
n
na no-
N
non-inverting input
NC
no connection
NC
normally closed contact
NEUT
neutral
NO
normally open contact
NOM
nominal
NORM
norma
NSE
noise
NVM
non-vo atile memory
O
output (solid-state switch)
OBS
obsolete
OFST
offset
ORG
orange
OSC
oscil ator (VCO)
OTA
operational transconductance amplifier
OUT
output
OV
overf ow
P
pico-
P
plug (designator)
P-
polyphonic (modulation)
PBND
pitch bend
PC
program counter (in CPU)
PCS
printed circuit board
PED
pedal
PNK
pink
PNL
panel
POS
positive
POT
potentiometer
PR
pair
PRGM
program
PRCMR
programmer
PROM
programmable read-only memory
PRST
preset
PS
program select
PSB
power supply board
PW
pulse width
PWM
pufse-width modulation
PWR
power
Q
transistor (designator)
QA
transistor array (designator)
QTY
quantity
R
resistor (designator)
RA
resistor array (designator)
RAM
random-access memory
REC
record
REF
reference
REG
regulation, regulator
REL
release
RES
resonance
REV
revision
RGT
right
RIP
ripple clock
ROM
read-only memory
RS
reset
RST
restart
S
switch
S
analog switch signal
SA
switch array (designator)
SAR
successive approximation register
SEC
second
6-2
SEL
select
SEQ
sequencer
SER
serial
S/H
sample and hold
SHT
sheet
SIC
signal
S/N
signaUto-noise ratio
S/N
serial number
SPAD
scratchpad (RAM)
SPK
spare parts kit
SPKR
speaker
SRC
source
ST
start
STRB
strobe
SUM
summation, summer
SUS
sustain
SYM
symmetry
SYNC
synchronization, synchronizer
SYNTH
synthesizer
SYS
system
T
transformer (designator)
lb
terminal board (designator)
TC
time constant
THRS
thresho d
IP
test point (designator)
TRI
triangle-wave
TRIG
trigger
TRIM
trimming, trimmer
TTL
transistor-transistor logic
TUN
tune
u
micro-
U
integrated circuit (designator)
u.
upper
UART
universal asynchronous receiver-transmitter
UNI
unison
USART
universal synchronous-asynchronous
recei ver-tra ns m 1 tter
V
Volts
V{A)
Vsuppy, analog circuit
V(D)
V supply, digital circuit
v-c
voltage-to-current converter
VCA
voltage-controlled amplifier (AMP)
VCF
vottage-controlled filter (FILT)
vco
voltage-con trolled oscillator (OSC)
VDAC
DAC output voltage
VIOL
violet
VMUX
POT MUX output voltage
V/OCT
volts-per-octave
VOL
volume
VPED
peda voltage (or, voltage pedal)
VR
voltage regulator (designator)
VREC
voltage record
W
wiring or cable
W-
wheel (MOD)
WHT
white
XOR
exc!usrve-OR
Y
crystal
YEL
yellow
,«
6-3/6-4
11 I J
SECTION 8
THEORY
8-0 INTRODUCTION
This is the first section of supplementary material appended to the Rev 3.0 Technical
Manual which covers the series referred to as Rev 3.1 and 3.2.
The updates and expansion of the microcomputer's memory configuration which became
Rev 3.1 are transparent, so, of no interest to the player. But once the Polyphonic
Sequencer for the Prophet- 10 was designed, we couldn't resist developing one for the
Prophet-5. Thus, shortly after Rev 3.1 went into production, we again redesigned the
Prophet-5 computer (and a few other circuits) to allow it to interface with the Model
1005 Polyphonic Sequencer and Model 1001 Remote Keyboard/Controller. Therefore if
they desire to use these products, owners of Rev 3.0 and 3.1 Prophets will need to have
their instruments upgraded to Rev 3.2.
Rev 3.0 started with serial number 1300. Specific tables of 3.1 and 3.2 serial numbers
and software versions are in Section 11. If you are in doubt about a Prophet's Rev, just
look at the silk-screening on PCB 3. Both revisions 3.0 and 3.2 have the numbers silk-
screened at the center top edge of the board. (Note that revision 3.0 is simply called
revision 3.) Revision 3.1 has the number screened at the top left corner of the board.
8-1 REVISION 3.1 COMPUTER and POWER SUPPLY
Please refer to SD3^i in Section 10. Revision 3.1 incorporates changes to the computer
operating system PROM and the Non-Volatile program RAM, For PROM, U312/13 2716
2-K units were put in place of the three 2708 1-K units in Rev 3.0. This allowed the use
of a higher-reliability part, elimination of the +12V and -5V power supplies, and created
program space for the diagnostic memory test. (The tests are covered in Section 11.)
To use the higher-density 2716s, the CPU address lines to U318 Me^mory Address
Decoder are shifted up to A12-AH. All was provided for later updating this board with
a 2732 ^-K. As shown, it is normally disconnected from the CPU. Instead, the All lines
to U312-U31^ sockets are tied high. (On the 2716, pin 21 is for the Vpp programming
pulse.)
The eight 6508 (IK x 1) NV RAM was changed to U383/8^, two ^33^ or 65U (IK x ^).
These parts have a higher reliability than the parts previously used. To achieve the
correct timing, the 3.1 (and 3.2) -NV WRITE signal is generated very differently from
the way it is in Rev 3.0. NAND-Gate U382-8 is wired as an inverter. Thus when U311-19
CPU -MREQ goes low, and A15 goes high, U382-11 goes low. U382-6, also an inverter,
goes high, raising U320-13. If S3 RECORD is set to ENABLE, U320-12 will also be high,
causing U320-11 to go low, enabling the NV RAM -WR inputs.
The Power Distribution area of the schematic shows the spare pins (2 and 3) on P302
created by removing the +12V and -5V lines from PCB 3. The back-panel cable wires to
these pins may or may not exist in a specific 3,1 unit. But on all 3.1 units, the
regulators and associated components were removed from PCB 5. (See SD5^1.)
TM1000D.2 10/81
8-1
I \
An additional, simple change was made to the CPU which has absolutely no effect on
operation, U31 1-25 -BUSRQ is a CPU output which in REV 3-0 was tied high. In Rev 3.1
this pin is pulled high through R315^ for optional use with factory test instruments,
503^2 shows how TP30^ was added to U32^-10 ADC BUS DRIVER, pulled low through
R3155. Tying this point high starts the memory test routine, as discussed in Section 11.
8-2 REVISION 3.2 COMPUTER and USART
Rev 3.2 was created to interface with the Model 1005 Polyphonic Sequencer and Model
1001 Remote Keyboard/Controller. In order to arrange the interface, the operating
system was again expanded and communication circuitry added. Changes were also
made to the Common Analog circuitry to accomodate PITCH and MOD CV inputs (see
para. 8-3).
See BD051 Rev 3.2 Interconnect Diagram. J17 DIGITAL INTERFACE jack on the back
panel is a ^-pin Switchcraft SL-i7-^F, SCI #3-053. To mate, use SL-^0-4M, SCI //P-053.
This jack is cabled along with ANALOG inputs from J 16 (see below) through J 15, to
added connector P305. SD351 shows the DIGITAL CABLE destination, U386 SIGNETICS
2661 Programmable Communications Interface. This USART exchanges data with a
compatible transciever over three lines as specified below. System interface program-
ming is discussed in Section 9 (as well as in the current Prophet-5 Operation Manual,
CMldOOC.l).
WARNING! This is not an RS-232 interface. It uses 5-V TTL levels. RS-232 voltage
levels (+/- 12 or +/-15V) will most likely blow the two input gates. Furthermore, most
RS-232 interfaces lack the speed required for transparent sequencer-Prophet communi-
cations.
Pin 1, GROUND
Pin 2, CLOCK TO SYNTH
This input sees pin 2 of a 7^LS08 (U385-3), with a lOK pull-up to +5V. Note that the
transmit and receive clocks (TxC, RxC) are tied together. Maximum frequency: 625
kHz. Minimum clock frequency for "transparent" real-time sequencer operation depends
on exact operations involved. Slower speeds will generally degrade performance by
causing the Prophet to wait too long for the sequencer to complete multi-byte data
transfers. 50 kHz is probably as slow as anyone is likely to find useful.
Pin 3, DATA TO SYNTH
This input sees pin ^ of a 7^LS08 (U385-6), with a lOK pull-up to +5V. Data format is
discussed in Section 9.
Pin ^, DATA FROM SYNTH
This is a M05 output direct from pin 19 of the Signetics 2661 USART. The driver Low
output voltage (Vql) is specified at O.W max. with a 2.2 mA output current (Iol)- The
driver High output voltage (Vqh) is 2.W min., specified at -^00 uA (Iqh)-
Digital Cable Specifications
ing used depends on the distance desired between units, and upon the noise
present in the system environment. Using individual coaxial cables for the two data and
clock lines will work best. It is likely you could have trouble-free operation at 20-ft or
longer. Three-conducter coax will probably work up to 10 ft. Single wires may be used
8-2
TM1000D.2 10/81
1 1
for the 2 to 5-foot range. The clock speed influences cable performance, since data
transfered at higher speeds encounters nnore reactance (hence, degradation) in the
cable.
USART OPERATION
Normally U386 USART stands unused. But it is initialized to interrupt the CPU when
serial data is received. When the CPU is interrupted, it stops whatever it is doing and
reads the USART data as if it were reading a memory device. The CPU can also output
a byte to the USART. As discussed in the section on programming, this data exchange
enables sequencing and remote keyboard control.
In more detail, pin 21 RESET connects to the CPU -RESET through inverter-wired
U382-3. When power comes on, RESET clears the USART's internal registers and sets it
to Idle. To operate, it must be initialized with the appropriate bytes sent to its control
registers.
The USART connects to the Address Bus. AO and Ai select, while A 15 actually
programs the reading and writing to or from the USART's receive, transmit, or control
registers.
While the Address Bus is used to program the USART, its data lines remain tri-stated
until pin 11 -CS goes low. The CPU sends commands and output data to the USART over
the Data Bus. The USART sends input data and its own status bytes (as opposed to
status bytes sent by the external sequencer) to the CPU.
After resetting and initializing the USART, it is set-up to respond to data input as
follows. Through the Low-Voltage Ouput Port Decoder U319, the CPU sets pin 10
-CSOL5 low. On Rev 3.0 this signal cleared the monophonic sequencer Interface to
GATE 5. On Rev 3.2 this signal clears the Interrupt Flip-Flop U330-2 (see SD352), while
GATE 5 is controlled separately. (GATE 5 is now memory-mapped. It is enabled by
U318-10, through inverter U3^3-6 and Flip-Flop U330-13.)
Once the Flip-Flop is reset, U330-2 -INT is high. Notice U385-8, the AND gate
(converted to negative logic by DeMorgan) connected to USART pin U RxRDY. -INT
connects to U385-9. Pin 10 is pulled high by R3153. Thus, with both inputs high, U385-8-
-which actually connects to the CPU— is high and the CPU runs normally.
The CPU is interrupted either by the USART signalling that it has received a byte, or
by a GATE occuring through the monophonic sequencer interface. In the first case, the
USART RxRDY pin goes low when the USART has received a serial data byte.
Whenever the -INT occurs, the CPU first examines the USART to see if its receiving
register is holding data. If not, then the -INT must have arisen from the monophonic
sequencer interface.
In this second case, the high SEQ GATE IN (J3) is inverted by U33U^, delayed slightly,
and re-inverted by U331-2 to clock the Interrupt Flip-Flop U330-2. Since pin 5 D is tied
high, pin 1 Q goes high, and pin 2 -Q goes low, generating the -INT.
TM1000D.2 10/81
8-3
1 J
8-2 REVISION 3.2 ANALOG and POWER SUPPLY
116 ANALOG INTERFACE connector is SCI //J-05^- To mate, use SL-40-5M, SCI //P-
05^, The pin specifications are:
I
WARNING! Since we have no idea what you will be connecting to these inputs, we
cannot guarantee this interface will work with any custom device. You are completely
responsible for any damage to the Prophet which may result from connecting non-SCI
accessories.
Pin 1, GROUND
Pin 3, +22V, unregulated, 50 mA
Pin 5, -22V, unregulated, 50 mA
These two supplies have 5.1-ohm current-limiting resistors (see SD551). But accessories
should be fully tested with another power source before connecting to these supplies.
WARNING! The Prophet can be damaged if these supplies are tampered with. For best
protection of the Prophet, it is best to avoid using these supplies.
Pin ^, PITCH WHEEL CONTROL VOLTAGE INPUT (P-WH CV IN)
This input raises or lowers the pitch of all five voices. The voltage applied should be
nominally zero for the instrument to be tuned to A-4^0. Both positive and negative
voltages can be applied. The Prophet disables this input during its TUNE routine to
prevent accidental detuning.
Pin 2, MODULATION WHEEL CONTROL VOLTAGE INPUT (M-WHCV IN)
This input ranges - +10V, with maximum modulation being applied at +10V. Do not
apply a negative voltage to this input.
Rev 3.2 changes to the Common Analog section are shown on SD35^. The MOD Wheel
circuitry has gained a Summer U374-8 to add the Mod Wheel CV and an external Mod
CV together. VGA U381-12 allows the remote voltage control, and introduces WHEEL
BAL trimmer R316S. Trim procedure is in Section 11.
Remote PITCH CV input required switch U377-10 to disable this input during the TUNE
routine.
8-^
TM1000D.2 10/81
I i
SECTION 9
PRCX^RAMMING
9-0 INTRODUCTION
This section is the software guide to the system interface distinguishing Rev 3.2
Prophet-5s. The interface was specifically designed to accomodate the Model 1005
Polyphonic Sequencer, Model iOOl Remote Keyboard/Controller, and other accesories.
But to encourage experimentation with remote programming of the Prophet we publish
this specification for enthusiasts who would design their own sequencer/controller.
Many of the popular microcomputers can now be interfaced to the Prophet-5.
All the information you need to use the interface is below. The programs required to
transmit keyboard status and to process external keyboard and program commands are
contained within the Prophet's own software. This considerably simplifies your sequen-
cer software design into the data exchange of "bit maps" of the keyboard as it is
recorded or played. The sequencer never enters into the Prophet's operating system
itself, so your experiments can not "hurt" the Prophet by faulty programming.
(Although you can of course cause damage with faulty hardware.) The Prophet's
operating system is in PROM and remains unaltered, no matter what you do. At worst
you will ercise the Non Volatile (NV) RAM which stores the "sound" programs. But the
programs are easily re-loaded through the standard CASSETTE interface. (The Model
1005 stores and loads programs through this system interface.)
This is a high-speed serial interface, with the clock supplied by the external sequencer
or keyboard. We can recommend the SIGNETICS 2651 or 2661 Programmable Communi-
cations Interface, which is essentially a microcomputer-oriented USART (Universal
Synchronous/ Asynchronous Receiver-Transmitter), because it is what the Prophet uses.
The 2661 can be clocked to 1 MHz. The Model 1005 clocks the Prophet at 625 kHz. Not
all USARTs will operate at the speeds required, so choose carefully. USARTs are
probably the easiest to use, but other techniques are possible. A cleverly-programmed
microprocessor could drive the interface directly, as could discrete logic.
9-1 Data Format
Both the DATA TO and DATA FROM SYNTH signals use the standard asynchronous
serial format; start bit, eight data bits, parity (odd), stop bit. Start bit is low, data is
positive, stop is high.
START
BIT
DATA
CLOCK
Figure 9-0
DATA FORMAT
TM1000D.2 10/81
9-1
t I
At the speed this system normally operates, completely asynchronous operation was not
possible. Therefore the external circuitry provides its own normally-high clock. Clock
division is not used, so during data transmission a clock pulse must accompany each
data bit. As shown, the Prophet receiver samples DATA TO on the rising edge of the
clock. The clock should be free running, but the system will work if the clock toggles
only during data transmission.
9-2 Error Checking
When it receives data, the Prophet receiver interrupts its CPU which examines a status
register in the receiver. The status register indicates if there are any errors. If there is
an error, the Prophet transmits code 3F on DATA FROM SYNTH.
There are three possible types of errors: parity, framing, and overrun.
Odd parity works by counting the total number of the data bits and the parity bit (9
total) which are set. If one, three, five, or seven data bits are set (1), parity is already
odd, therefore the parity bit is left reset (0). If zero, two, four, six, or eight data bits
are set, the parity bit is set to make the total set bit count odd. The Prophet checks
DATA TO for parity. The Prophet sends the parity bit with DATA FROM. However, you
may choose to ignore parity at your sequencer receiver.
A framing error results when the receiver doesn't find a stop bit at the end of the byte.
In a standard asynchronous system this could be caused by a gross difference in transmit
and receive clock frequencies. On this system there is a single clock, so a framing error
may only result from actual data loss or noise.
An overrun error results when data is being sent too fast for the Prophet receiver to
process it (or, by not allowing enough time between bytes). So, this error results from
transmit timing problems with your interface.
9-3 Status Bytes
The Prophet-5 never volunteers DATA FROM, it only transmits when prompted by the
sequencer. Communication is initiated by the sequencer transmitting "status" bytes
which may or may not signify that data follows. For example, to change programs the
sequencer first sends a byte to the Prophet saying that the next byte is the new
program number. The Prophet will then wait for this second"Byte, and change its
program accordingly when it is received.
There are 12 unique status bytes. A status byte Is simply a unique hexadecimal (H)
number. It is distinguished from other bytes merely by being the first which the
sequencer transmits to the Prophet as part of any data transfer. The Prophet requires
- 1-1/2 milliseconds (worst case) to respond to the status byte interrupt. It will then be
ready to receive or transmit data which is formatted and timed as specified below.
Generally, while data can be transmitted with spaces of between 1 to ^ ms between
bytes without causing errors, you will probably want to operate faster for the most
transparent operation. Most of the Prophet's receiving operations are accompanied by a
"time-out" which declares an error if data is not received within ^ ms. When such an
error is detected, the Prophet simply ignores the received data and resets to wait for
another status byte. So if your data arrives too late, or you accidentally send more data
than needed, the Prophet may interpret the data as a status byte.
9-2
TM1000D.2 10/81
I J I J
The Prophet will not accept status bytes during its TUNE routine. During TUNE, DATA
FROM transmits a BREAK signal to tell the sequencer the Prophet isn't listening. The
BREAK is simply a continuous low on DATA FROM. In other words, your receiver will
see a start bit followed by no stop bit. The break can therefore be detected by counting
at least two framing errors with zero as data received. The BREAK can therefore be
used to inhibit the sequencer.
9-<* STATUS 0: SEND KEYBOARD and BANK/PROGRAM BYTES
This status byte is used for the sequencer to record the Prophet's keyboard and "sound"
program status. Code 01(H) on DATA TO interrupts the Prophet to read its keyboard.
After a - 2-ms (worst-case) delay to respond to the interrupt, the Prophet transmits
eight bytes of keyboard information over DATA FROM- As mapped below, 61 of the 6^
bits represent key status (three aren't used). means the key is off ("up"), 1 means the
key is on ("down"). As shown, the least-significant bit (LSB) of the first byte is the
lowest C (CO).
LSB
MSB
Byte
CO
cm
DO
D#0
EO
FO
F#0
GO
Byte 1
G//0
AO
A#0
BO
CI
C#l
Dl
D#l
Byte 2
El
Fl
F//i
Gl
G//1
Al
A//1
Bl
Byte 3
C2
C#2
D2
D#2
E2
F2
F#2
G2
Byte It
G#2
A2
A#2
B2
C3
C#3
D3
D#3
Byte 5
E3
F3
F#3
G3
G#3
A3
A// 3
B3
Byte 6
C«f
cn
D^
D//4
Ett
F'f
?m
G^
Byte 7
Qm
M
A//^
B«f
C5
X
X
X
After sending the eight keyboard bytes the Prophet sends a byte which contains the
bank and program number. This byte's format is that the least significant three bits are
the PROGRAM number; corresponds to program number 1, 7 corresponds to program
number 8. The next three bits are the BANK number; is bank 1, ^ is bank 5. (The two
most significant bits aren't used.)
These nine bytes follow close on one another. The delay between keyboard bytes and 1
is 150 us. The time between the remaining eight bytes is a uniform 36.^ us. The
sequencer receiver must be ready to receive this data with the required speed, or an
overrun error will occur in the sequencer. Note that it is also a good idea to insert
"time-outs" in your receiver software so your system is not hung-up waiting for bytes
which it somehow may have missed.
You will have to format this data in RAM for your particular requirements. For
example, since these bytes only tell the sequencer what keys are being held when it
asks, in order to create timing information the sequencer will have to continually
sample the Prophet's keyboard and compare to find out when keys go on or off.
9-5 STATUS 1: SEND ACK and RECEIVE KEYBOARD
and BANK/PROGRAM BYTES
This status is used for the sequencer to play the Prophet's keyboard and select
programs. When code 02(H) is received, the Prophet processes the interrupt (again, for
up to 2-ms, worst-case). When it is ready to receive eight keyboard bytes and a program
byte, It acknowledges the sequencer's request by sending the "ACK" code 36(H). The
sequencer then transmits the keyboard and program bytes in the format discussed under
STATUS 0-
TM1000D.2 10/81
9-3
T .1 T L
For the most transparent operation, you will want a minimum of time between bytes
transmitted to the Prophet, The faster the transfer, the truer the timing will be. Some
specific timing figures may be of use. For example, the Prophet's scan time (for each
program loop) is 6 ms, or 11 ms if controls are being used. This means there is a worst-
case delay of 1 1 ms between a key being pressed and its being heard or recorded. This is
not normally detectable in the Prophet. However, sequencing adds new timing concerns,
since the Prophet waits for the transfer to be completed before continuing its loop.
With a 625 kHz clock, 9 serially-formatted bytes will take only 158,^ us (1.6 us X 99
bits). But if they are spaced 1 ms apart, the whole transfer will about double the worst-
case loop time. It is more reasonable to use the fastest clock possible, and allow up to
100 us between bytes. This will have a negligible effect on the Prophet's loop.
The Prophet is protected from being "hung-up" by extremely slow or nonexistent data.
Its time-out software declares an error and ignores the whole message if more than
about k milliseconds elapses between bytes.
When the message is complete, the Prophet places this data into its "Scratchpad" RAM
table, playing the notes as if they came from its own keyboard. Even while receiving
from the external sequencer the Prophet's keyboard remains active and can be used
normally (unless the sequencer TRANSPOSE function is enabled, see STATUS 2). Of
course you still have a five-voice maximum. So if you, for example, play on the
keyboard while the sequencer is playing, you will "steal" voices from the sequence.
If no program change is desired, you can either transmit the last program number, or
the code FF(H) which the Prophet simply ignores. Except for the FF code, the Prophet
will sense an error if either of the two MSBs of the program byte are set.
NOTE. Be sure the Prophet is switched to PRESET mode when you want to change
programs.
(Status B can be used for changing the program only . Status E can be used for receiving
"short" keyboard data. See below.)
9-6 STATUS 2: TRANSPOSE ON
This status byte is used to enable the sequencer transpose function. Once the Prophet
receives code 0^(H), you can transpose the entire playback sequence over a four-octave
range by just hitting a key between CO and C^ on the Prophet. The transposition is
equal to the interval between C2 and the key played. For example, to transpose down a
fifth, hit Fl. To transpose up a major seventh from the original key, hit B2. To
transpose back to the original key, hit C2.
9-7 STATUS 3: SAVE TO TAPE
This status byte is used to extract the contents of the Non-Volatile program RAM from
the Prophet, without using the independent CASSETTE interface. Organized as ^0 2^-
byte programs, NV RAM uses 960 of its 102^ (IK) bytes. The least-significant seven bits
of each byte represent a programmable pot setting of -127 steps, while the MSB
represents a switch setting (l=on, O=off), The Prophet has another area of RAM called
"Scratchpad" in which the current status of the machine is registered. When selecting a
program in PRESET mode, a set of 2^ bytes is transferred from NV RAM to the
Scratchpad, with the "pot" bits filling the pot table and the switch bits being regrouped
into the switch status table. Here is how the pot and switch bits are grouped in each NV
program:
9-^
TMiOOOD.2 10/81
Byte
Byte 23
Switch Bit (7)
OSC A PULSE
OSC A SAW
OSC A SYNC
OSC B SAW
OSC B TRI
OSC B PULSE
OSC B KBD
UNISON
POLY-MOD FREQ A
POLY-MOD PW A
POLY-MOD FILT
LFO SAW
LFO TRI
LFO SQUARE
FILT KBD
RELEASE
W-MOD FREQ A
W-MOD FREQ B
W-MOD PW A
W-MOD PW B
W-MOD FILT
OSC B LO FREQ
X
X
Pot Bits (Q-6)
FILT ATK
FILT DEC
FILT SUS
FILT REL
AMP ATK
AMP DEC
AMP SUS
AMP REL
FILTER CUTOFF
FILT ENV AMT
MIX OSC B
OSC B PW
MIX OSC A
OSC A PW
MIX NOISE
FILT RESONANCE
GLIDE
LFO FREQ
W-MOD SOURCE MIX
P-MOD OSC B
P-MOD FILT ENV
OSC A FREQ
OSC B FREQ
OSC B FINE
For use with this interface, the Prophet maintains a pointer to NV RAM addresses
which allows implied addressing. The pointer initially indicates the first NV RAM
address. Whenever the Prophet receives a code 08(H), it outputs the NV RAM byte
currently being pointed to, then increments the pointer. Therefore to read all of the NV
RAM, the sequencer will have to supply exactly 102<^ STATUS 3 requests. (This will
leave the pointer reset at the NV RAM beginning address again.) To access specific
programs, you can send the number of STATUS 3's required to increment the pointer to
the desired starting address, and simply ignore the data the Prophet returns.
Any detected error resets the NV RAM pointer to the first address.
9-S STATUS *: LOAD FROM TAPE
This status byte is used to initiate a loading of NV RAM, When the Prophet receives
code 10(H), it sets itself to TAPE READ mode, in which it expects to receive exactly
20^8 bytes. This will be the entire ^0-program data block sent twice (without
interruption). The first byte received will be placed in the NV location indicated by the
pointer. The Prophet will not recognize status bytes again until all 20*8 bytes have been
received, or an error occurs. The error clears TAPE READ mode and resets the NV
pointer to the first NV address.
To load NV RAM, the Prophet's back panel RECORD switch must be ENABLED.
9-9 STATUS 5: CLEAR TRANSPOSE
Code 20(H) turns off the TRANSPOSE function enabled by Status 2. It also returns the
sequence to its original key.
TMiOOGD.2 10/81
9-5
r I
9-10 STATUS 6: INITIALIZE SEQ LOWER PROGRAM
This status byte ^O(H) was inherited from the Prophet-iO but should not be sent to the
Prophet-5.
9-li STATUS 9: DISABLE TUNE
Code 09(H) is used to disable the Prophet*s TUNE switch. An ideal application would be
for the sequencer to disable TUNE before executing a LOAD FROM TAPE operation
(STATUS ^).
9-12 STATUS A: ENABLE TUNE
Code OA(H) reverses STATUS 9, to allow the Prophet to be tuned. This code doesn't
start the TUNE routine, it just enables you to hit the switch.
9-13 STATUS B: RECEIVE PROGRAM CHANGE
Code OB(H) prepares the Prophet to change programs, without the Prophet sending an
ACK as with STATUS 1. The program byte has the format described under STATUS 0,
and should follow STATUS B after 2 milliseconds. If it arrives before 2 ms, an overrun
error may occur. If it doesn't arrive within ^ ms, the Prophet will then expect to be
receiving status bytes again.
9-U STATUS C: SYSTEM CONNECT
This status byte is best used for initial testing of your system hardware. The Prophet
responds to code OC(H) by sending an AA(H). The sequencer thus learns that the Prophet
is connected and listening.
9-15 STATUS E: RECEIVE SHORT KEYBOARD DATA
This status byte is similar to STATUS 1, except that the keyboard data is limited to
seven bytes (56 notes), and there is no program byte. There is also no ACK. In short, the
sequencer ideally sends code OE(H), waits 2 ms, then sends seven bytes at iOO-us
intervals. There is a ^-ms timeout.
9-6
TM1000D.2 10/81
t J II
SECTION 10
REVISION 3.1 and 3.2 DOCUMENTS
10-0 DOCUMENT LIST
D
5D3'tlC
E
SD3'*2B
N
SD5'*1A
BD051A
PP351
D
5D351D
E
SD352C
G
SD35UA
PP551A
N
SD551A
Rev 3.1 PCB 3 CPU, MEMORY (l/«f)
Rev 3.1 PCB 3 DAC, ADC, TUNE, SEQ, CASS BUS DRIVERS (2/4)
REV 3.1 PCB 5 POWER SUPPLY
REV 3.2 INTERCONNECT DIAGRAM
Rev 3.2 PCB 3 PARTS ID
Rev 3.2 PCB 3 CPU, MEMORY, USART (l/^f)
Rev 3.2 PCB 3 DAC, ADC, TUNE, SEQ, CASS, BUS DRIVERS (2/4)
Rev 3.2 PCB 3 WMOD, MASTER SUMMERS (4/4)
Rev 3.2 PCB 5 PARTS ID
REV 3.2 PCB 5 POWER SUPPLY
TMIOOOD.2 10/81
10-1
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SECTION 1 1
SERVICE
Il-O INTRODUCTION
This section contains instructions for converting Rev 3.0 or 3.1 Prophets to Rev 3,2. It
also presents procedure for Rev 3.0, 3.1, and 3.2 diagnostic computer tests. Finally,
there is a trim procedure for the added WHEEL-MOD VGA in Rev 3.2.
11-1 REVISION 3.2 RETROFIT KIT INSTRUCTIONS
Revision 3.2 Retrofit kits can be ordered through the Service Dept. as Model S63- The
kit includes:
QUANTITY
3
1
2
1
1
SCI P/N DESCRIPTION
M-031
M-362
R-0^6
Z-803
Z-80^
lockwasher
DIGITAL/ANALOG Label
5.1 ohm
Assembled and Tested PCB 3
Assembled and Tested Wire Harness
Back Panel Modification
1. Open the Rev 3.0 or 3.1 Prophet as shown in Section 1. Disconnect Power Supply
connector P302 and the Audio Cable P^02. Set the entire top section aside.
2. Remove PCB 5 Power Supply Board and regulators from back panel. PCB 5 will later
be modified.
3. Mark and centerpunch the back panel according to Fig. 11-0.
^. Drill (2) y<»-inch pilot holes.
5. Enlarge the holes to 5/8" using a chassis punch according to the instructions provided
by the manufacturer. (Order SCI //Q-06^, GREENLEE Chassis Punch #799-321^,)
6. Mount the jacks according to Fig. 11-1. Make sure that the jacks are mounted in the
correct locations, which are the 5-pin jack on the right (toward edge) and ^-pin jack on
the left. Note: To prevent twisting which could damage the wiring, hold the back of the
jack with a wrench when tightening the front nut,
7. Install label (M-362) below jacks as shown in Fig. 11-0.
TM1000D.2 10/81
11-1
^ 1
1 ;
Figure II-O
Figure
11-
4 PIN
TM1000D.2 10/81
T J
PCB 5 Modifications
8. If the Prophet is Rev 3.1, go to step ^0.
9. If the Prophet is Rev 3.0, refer to pages 3-22 and 3-23 above, and remove these parts
from PCB5: C507 (2.2 uF), U50^ (78MI2), R50* (IK), C506 (2.2 uF), U503 (7905).
10. Install a 5.1-ohm resistor between holes 1 and 3 of U50^. As can be seen on the
schematic, this ties +22V to the (formerly) +12V line. (The Rev 3.2 PROM doesn't need
+ 12or-5V.)
11. Install a 5.1-ohm resistor between holes 2 and 3 of U503. This ties -22V to the
(formerly) -5V line.
12. Reinstall PCB5. There have been a few instances of loose regulators producing
inter mittant problems, usually with tuning. To prevent this, drill out the mounting holes
with a #33 bit. Re-install the three remaining regulators, using nylon shoulder washers
and adding the provided lockwasher under the //4 nut. Use loctite on threads. Hold nut
with wrench and tighten screw with screwdriver tightly (until nylon shoulder washer
begins to deform). Check for electrical isolation with ohmmeter.
PCB 3 Replacement
13. Remove the Rev 3.0 or 3.1 PCB 3 referring to pages 1-1 through 1-4.
14. Install the Rev 3.2 PCB 3.
15. Connect 315 9 pin connector to P305 on PCB 3. (For reference, see Rev 3.2
Interconnect diagram in Section 10.)
16. Reconnect remaining cables and check that all connections are tight.
17. Follow the Functional Test Procedures detailed above in pages 4-2 through 4-9.
18. Trim as required (see pages ^^-U to It-16).
TM1000D.2 10/81
11-3
I 1
11-2 REVISION 3.0 MEMORY TEST
Rev 3.0 Serial Numbers: 1300-2285, 2^24-2^51, 2^56, 2^66, 2^77
Software: V.8.0 (1300-1309, 1311, 1312, 131^-1321, 132^, 1328)
V.8.1 (1310, 1313, 1321-1323, 1325-1327, 1329-2285,
2424-2451, 2456, 2466, 2477)
NOTE: Following the appearance of a few Rev 3.0 Prophets which spontaneously put
themselves into Edit Mode, the Rev 3.0 has been updated to (post-production) V.8.2,
available as a 3-PROM set, SCI #2-984.
Rev 3.0 Prophet-5s are tested with a special 2708 EPROM which can be ordered as SCI
//Z-953.
NOTE. Check that the RECORD switch is ENABLEd, and that user's programs are
stored on cassette since the memory tests erase the NV RAM contents.
1. Switch power off and insert PROM in PROM location (U312). (If available, insert
factory program PROM PROG5.5 into PROM 1 (U313) location. The test will load NV
RAM with programs during section 3).
2. Switch power on. The test will start, indicating the memory section in the
PROGRAM display:
1 = Scratchpad RAM
2 = NV RAM
3 = NV RAM load
4 = 8253 Timer
= End of test. No failures.
i
3. If a test fails, the program halts and displays the section number for the problem
area. Further tests are not executed until the problem is fixed-
11-3 REVISION 3.1 MEMORY TEST
Rev 3.1 Serial Numbers 2286-2423
Software: V.9.1
Rev 3.1 has the memory test built-in but a simple hardware modification may be
required before it can be enabled.
NOTE. Check that the RECORD switch is ENABLEd, and that user's programs are
stored on cassette since the memory tests erase the NV RAM contents.
1. First, switch power off. The RAM test program is contained in the standard 2716
software, V.9.1. (NV load similar to Rev 3.0 is provided.)
2. If necessary, on foil-side (or, bottom) of PCB 3, cut trace between U324-10 and
ground.
3. See SD342 in Section 10. If not installed, connect R3155 lOOK pull-down resistor
from U324-10 to ground at U324-8.
*-^.
U-if
TM1000D.2 10/81
1 J
^. To vector to the internal test program, jumper TP305 (U32if-10) to +5V then switch
power on. (The test point location is shown on PP351, Section 10). The test will start,
indicating the memory section in the PROGRAM display:
1 = Scratchpad RAM
2 := NV RAM
3 = NV RAM load
^ = 82^3 Timer
= End of test. No failures.
5. If a test fails, the program halts and displays the section number for the problem
area. Further tests are not executed until the problem is fixed.
11-^ REVISION 3.2 MEMORY TEST
All Rev 3.2 Prophet-5s have the memory test built-in.
Rev 3.2 2^52-2^55, 2^57-2^65, 2467-2^76, 2^78 and up
Software: V.9.2
Software level V.9.2 has the memory test only. Later-production instruments have
software version V.9.3 which prefaces the memory test with a basic CPU test. This
routine doesn't use RAM so is useful for seeing if the CPU itself is working and
accessing PROM. ^
NOTE. Che ck that the RECORD switch is ENABLEd, and that user's progra ms are
stored on c assette or via the Model 1003 Polyphonic Sequenc er since the memorv tests
erase the NV RAM contents. -^
1. First, switch power off.
2. To vector to the internal test program, jumper TP30^ MEM TEST to +5V then switch
power on.
3. If software is V.9.3, the Prophet will sequentially flash its LEDs (in the order in
which they are wired in the matrix). To exit this mode and start the regular RAM test,
press TUNE.
^. The memory test will start, indicating the memory section in the PROGRAM display:
1 = Scratchpad RAM
2 = NV RAM
3 = PROM
^ = 8253 Timer
= End of test. No failures,
3. If a test fails, the program halts and displays the section number for the problem
area. Further tests are not executed until the problem is fixed.
TM1000D.2 10/81
li-5
T r
1 1-5 WHEEL BALANCE TRIM
1. See para, <J-13 and trim WHEEL-MOD LFO VGA BALANCE, and see para. 4-15 and
trim WHEEL-MOD NOISE VCA BALANCE.
2. Switch off all LFO waveshapes.
3. Set WHEEL-MOD SOURCE MIX knob to 0.
4. Advance MOD wheel fully.
5. Probe U37l^-ll^, W-MOD Buffer output. (For parts locations, see PP351 in Section 10.)
6. Adjust R3168 WHEEL BAL trimmer to read as close to O.OOOV as possible.
11-6
TM1000D.2 10/81
SECTION 12
PARTS
REVISION 3.2 COMPONENTS
Changed from Rev 3.0
R339
R-217
R378
R-llOA
R3119
R-175
R3120
R-015
R3153
R-025
Added
D320
D-005
Q310-12 T-003
R315'f
R-OU
R3155/6
R-012
R3157/8
R-025
R3159
R-011
R3160
R-OlO
R3161
R-025
R3162
R-llO
R3163
R-108
R3i6ii
R-K'f
R3165/6
R-077
R3167
R-036
R3168
R-217
R3169
R-012
R3170
R-00^
R3171
R-030
R3172
R-022
R3173
R-00^
R511/2
R-0«t6
SECTION 13
PROPHET-5 REV 3.3 UPDATE
This modification increases the Prophet-5*s program storage capacity from ^0 to 120.
The update involves adding a jumper to the back of PCB 2 Left Control Panel, adding
RAM and some logic to the Rev 3.2 PCB 3 Computer Board, and changing the
software. The Update Kit (#Z-205) includes the following parts:
PARTS
CM1000C.2 Prophet-5 Rev 3.3 Op Manual Addendum
1-043 6116 RAM
1-240 74C00 Quad NAND gate
:i-017 24-pin DIP socket
Z-994 Prophet-5 software
Z-068 Prophet"5 120-Factory Program Cassette
PROCEDURE
1. Switch power off and disconnect the Prophet from the AC line.
2. Open the box. (For instructions, see Section 1 of Technical Manual TMIOOOD.)
3. Disconnect and remove PCB 4.
4. Disconnect and remove PCB 3.
5. See Fig. 1 and add the jumpers shown to the back of PCB 2. This ties together the
display decimal points (pins 4 and 9) to LD7, pin 33 of TB201, as shown on the Rev 3.3
PCB 2 schematic (attached).
6. The remaining modifications to PCB 3 are illustrated in Figs. 2 and 3, and the Rev
3.3 PCB 3 schematic (attached). First bend out all the pins of the enclosed 74C00 Quad
NAND gate, except pins 4, 7, and 14. Solder this device "piggyback" to U309 (74C02)
at pins 4, 7, and 14 (Note that U309 is oriented with pin 1 at the upper right).
7. The added 74C00 is designated U387. Jumper U387 pins 2, 1, 14, and 13 in a loop
around the end of the IC.
8. Jumper U387-10 and U387-11.
9. Jumper U387-4 to U387-9.
10. Jumper from the feed-through for U311-1 (All), to U387-5 and -12. It should be
possible to do this with one piece of wire.
TM1016A 4/82
13-1
I [
* J
STEP 5
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13-2
TM1016A ^/82
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Figure 13-1
PCB 3 TOP MODIFICATION
TM1016A */82
13-3
'I \ i
11. Jumper from the feed-through for U31^-18 (-CE), to U3S7-8.
12. Jumper from U38^-8 (-CS), to U387-6.
13. See Fig. 3 (bottom). Jumper U3U-2^ to U383-18 (Vnv).
1^. Jumper U3ia-21 to U383-i0 (-WR),
15. See Fig 2. Cut trace between U38^-8 and U309-1.
S
16. Cut the trace between U31^-2^ and +5V.
17. Cut the trace from U318-13 (-ROM 2) to U314-18.
18. Install the 2^-pln socket in the space reserved for U31^.
19. Insert 6116 RAM into U31^ socket.
20. Replace software at U312 with version enclosed.
21. Assemble unit and run a functional test.
22. Verify NV operation by recording, and loading (and re-saving) included factory
programs to Program Files 2 and 3 with the Cassette Interface. (The Addendum
enclosed with the kit explains how to access the new Program Files.)
13-/^
TM1016A <^/82
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Figure 13-2
PCB 3 BOTTOM MODIFICATION
TM1016A ^/82
13-5
/
h
t I
'2K
peoi
104
U204 +sd
060 4
TB201 TO PCS !
SPARES^
10
5V
t ^^yU209
RESISTOR FW:*^
ALL £SK
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I
SW/KBD ROW
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TB201 TOPCBi
25 23
SW/KBD STATUS
BUS DRIVER
^S20l-2l ARE BL4CK
S2E2/24 ARE GREV
S223 15 ORANGE
A
2\C0HTRa3 IN WRENTHESIS
AfJE ON PCBI
iwrc
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■H
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nEVIMOM
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^EOUEnLiAL Ci^CUiO inc
mu
PCB 2 CONTROL MATRICES
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SD232
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CLOCK
X0»2C
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2,5 MHi
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a.5MHi
+ 5V
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BATTWt I 'I
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IN9I4
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Z-80
BUSRQ
WAIT
NMI
INT
A
12
30
31
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53
34
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36
39
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GND
.20
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.22
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9
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DECODER
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PORT
DECODER
ADDRESS BUS LEVEL SHIFTER
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PORT
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ADDRESS BUS
ROM0
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NON-VOLATfLE PiTOCRAM ARMORY
U3I6
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.10
SCRATCHPAD
4-5V
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SECTION 2*
INDEX TO TM1016B
Index Datet 6 Dec, 1982
Index also covers TMIOOOD.^ (Sections 1-13, 23) and TM1016A (Sections 1-22)
Instrument Codes
Instrument series are coded by model number, followed by a period and the rev level.
1000.1
1000.2
1000.3.0
1000.3.1
1000.3.2
1000.3.3
1001
1005
1010.0
1010.1
1015.0
1015.1
1016.0
1016.1
Prophet
Prophet
Prophet
Prophet
Prophet
Prophet
Prophet
Prophet
Prophet
Prophet
Prophet
Prophet
Prophet
Prophet
-5 Synthesizer, Rev 1 (S/N 1-182)
-5 Synthesizer, Rev 2 (184-1299)
-5 Synthesizer, Rev 3 (1300- )
-5 Synthesizer, Rev 3.1 (RAM changes)
-5 Synthesizer, Rev 3.2 (USART, Analog)
-5 Synthesizer, Rev 3.3 (120-program)
-5 Remote Keyboard
-5 Polyphonic Sequencer
-10 Synthesizer, Rev (1-329)
-10 Synthesizer, Rev 1
-10 Polyphonic Sequencer, Rev (1-329)
-10 Polyphonic Sequencer, Rev 1 (330- )
-10 with Rev Sequencer
-10 with Rev 1 Sequencer
TOPIC
ADC
1000.3.0 .
1010
additive synthesis
add re ss
address bus
1000.3.0
1000.3.1
1000.3.2
1005
1010
1015.1
amplifier (final VCA)
amplifier envelope generator
analog interface
1000.3.2
assembly procedures
audio output (volume)
1000.3.0
1010
PAGE(S)
2-16, 2-17, 2-19, 2-20, 3-12, 4-11
14-8, 15-13, 16-14
2-2
see "memory address" or "I/O interface"
2-10, 2-12, 3-11
8-1
8-3
18-2
14-6, 14-7
18-2
2-1, 2-4, 2
2-1, 2-4, 2
9, 3-17 thru 3-21, 4-1, 4-6, 4-16
7, 2-9, 3-17 thru 3-21
8-2, 8-4
1-1 thru 1-7
2-4 thru 2-6, 2-9, 2-10, 3-5, 3-14, 3-15, 4-1
14-10, 15-5, 15-23, 16-15
TN1016-1 10/83
24-1
'^'K'..v ' ■ '<'
A-ttkO
1000.3.0
1010
back panel
balance (VGA)
battery
1000.3.0
1010
bias (tuning)
BIFET
BOM
bottom panel assembly
bus bar
2-20, 3-15
[k-5
2-9
2-12, 3-11
lt^-6, 15-11
2-7, 2-19, 2
2-18
5-9
1-1,
1-6
-20
cable,
1000.3
audio output
back panel
interconnect
keyboard
voice power
wheel
1005 interface
cassette interface
1000.3.0
1010
chassis parts
1000.3.0
chip select (-CS)
1000.3.0
1010
clock, system
1000.3.0
1000.3.1 .
1005
1010
1015.0
1015.1
common analog
1000.3.0
1000.3.2
1010
computer
1000.3.0
1000.3.1
1000.3.2
1005
1010
1015.1
control bus
1000.3.0
controls
1-1 thru 1-3
1-^
1-3
1-5
1-3
20-7
2-12, 2-21, 3-12
15-13
5-1
2-10
2-it, 2-12, 3
10-2
18-1, 19-11
1^-5, 15-11
20-1
18-1
-11
1-3, 2-H, 2-7, 2-8, 3-1^
8-2
I'f-S
2-1^, 2-5, 2-10, 2-1^, 3-11 thru 3-13
8-1, 10-2
8-2, 10-7
18-1
l*-2, 15-11 thru 15-1«^
18-1
2-10, 2-12
see "knobs" or "switches"
24-2
TN1016-1 10/83
r J
control panel
1000.3.0
1010
CPU
1000.3.0
1000.3.1
1000.3.2
1005
1005
1010
1015.0
1015.1
CV outputs
DAC
1000.3.0
1010
deck, nnlni cassette
deck, wafer
demultiplexer (CV DMUX)
1000.3.0
1010
diagnostics
1000.3.0
1000.3.1
1000.3.2
1005
1010
1015.0
1015.1
digital interface
1000.3.2
1001
diodes, matrix
disassembly procedures
documents
document lists
1000.3.0
1000.3.1
1000.3.2
1005
1010
1015.0
1015.1
document notes
drivers (bus)
1-5, 2-15, 3-2 thru 3-9
15-^^ thru 15-9
2-4 thru 2-7, 2-10, 2-12,
2-
■15,
2-
■17,
2-
-19,
3
10-2
8-3, 10-7
J
18-1
18-1, 19-4
14-5, 14-6, 15-11, 16-1
19-4
1
18-1, 19-10
see "demultiplexer"
-11
2-8, 2-15 thru 2-18, 3-12, 4-11
14-8, 15-13, 16-14
18-6 thru 18-8, 19-12, 19-13, 20-1
14-2, 14-9, 18-1, 18-4, 18-5, 19-8,
2-16, 2-18, 3-13, 3-15
14-8, 15-14
11-4
11-4
11-5
20-5
16-16
20-1
20-5
20-1
8-2, 9-1 thru 9-6, 11-1
22-1
2-15
1-1 thru 1-7
see "parts identification" or "schematics"
3-1
10-1
10-1
19-1
15-1
19-1
19-1
3-1
2-10
edit mode
envelope
equalization
2-7, 2-10, 2-16
see "filter envelope" or "amplifier envelope"
14-10, 15-24
TN1016-1 10/83
24-3
t V
t I
EPROM
1000.3.0
V.8.0
V.8.1
V.8.2
1000.3.1
V.9.1
1000.3.2
V.9.2
1000.3.3
V.9.5
1001
1005
1010.0
1010.1
V.5
1015.0
SEQ9.1
1015.1
SEQB.1 (16K)
SEQC.1 (64K)
2-7, 2-10, 2-12, 2-14, 3-11
ll-'t
ll-'f
8-1
9-1
11-5
23-3
22-1
18-1, 19-10, 19-11, 20-5
11^-6, 15-11
16-1
16-1
19-4
20-1
18-1, 19-11, 20-5
20-4
20-4
fake clock
filter (VCF)
1000.3.0
filter envelope amount VCA
filter envelope generator
filter keyboard
final VCA
frequency CV
2-19
2-1, 2-4 thru 2-7, 2-9, 3-17 thru 3-21, 4-6, 4-14,
7-9
4-14
2-1, 2-4, 2-6 thru 2-9, 3-17 thru 3-21, 7-5
2-7
see "amplifier"
2-4, 2-7
gate
1000.3.0
1010
glide
1000.3.0
1010
gate output
1010
I
ground loop
input/output (I/O) interface
1000.3.0
1000.3.2
1005
1010
1015.0
1015.1
interconnection
1000.3.0
1000.3.2
1016
2-2, 2-4, 2-7, 2-14, 2-15, 4-1
14-7
2-9, 2-17, 3-14, 4-5
14-8, 14-10, 15-16
14-7
1-3
2-7,2-10, 2-12, 2-13,3-11
8-3, 10-7
18-1, 18-2
14-5, 15-12
19-4
18-2, 19-10
3-3
10-5
15-3
24-4
TN1016-1 10/83
t I
I ^
interrupt (-INTor
-NMI)
1000.3.0
2-12, 2-20
1000.3.2
8-3
1001
22-2
1010
U-5, l*-6, 15-3
J-wires
1-6
1000.3.0
2-15
1010
l'f-2
keyboard CV
2-1, 2-7, 2-8, 2-15, 2-17
keyboard
see also "switch/keyboard matrix"
1000.3.0
1-6, 1-7, 2-1, 2-if, 2-7, 2-8, 2-17, 3
1010
U.2, lt^.7, 15-8
knobs
2-7
LED matrix
1000.3.0
2-15,3-5,3-9
1000.3.3
13-7
1001
22-1
1010
l*-5thru lt^-7, 15-5, 15-9
level shifters
address bus
2-13, 3-11
CS/data bus
2-13, 3-11
envelope generator CV
2-9, 3-15
oscillator B triangle
2-8
LFO
1000.3.0
^
2-7, 2-8, 3-li^, 4-7
1010
14-8, 15-15, 16-13
line voltage select switch
1-1
loop (scan time)
1000.3.0
2-10, 2-15, 2-16, 2-18
1000.3.2
9-2, 9-4
1010
14-2, 14-5
manual rriode
master summers
1000.3.0
1010
master tune
1000.3.0
1001
1010
master volume
memory
1000.3.0
1005
1010
-9
2-7, 2-16
3-14, 4-10
14-7, 15-16, 15-17, 16-14
2-4, 2-7, 3-5, 3-14
22-6
14-10
16-15
see also "EPROM" and "RAM"
2-7, 2-10, 2-12,3-11
18-1
14-5, 14-6
TN1016-1 10/83
24-5
I J
memory interface
1000.3.0
1000.3.1
1000.3.2
1000.3.3
1005
lOiO
1015.0
1015.1
microcomputer
microprocessor
mixer
models
modification policy
modifications (authorized)
1000.3.0 to 1000.3.2
1000.3.0 to 1000.3.3
1000.3.1 to 1000.3.2
1000.3.1 to 1000.3.3
1000.3.2 to 1000.3.3
1005
1010.0
1015.0 to 1015.1
1015.1
modulation wheel
mono-mod
multiplexer (POT MUX)
1000.3.0
1010
multiplexer (TUNE MUX)
P
n-key rollover
noise (modulation)
noise (white-mixer)
2-10, 2-13, 3-11
8-1, 10-2
10-7
13-8
18-1
li^_6, 14-7, 15-11
18-1, 19-10
see "computer"
see "CPU"
2-tt thru 2-7, 2-9,
see "revisions"
V (D.2)
'f-5
11
23
11
23
13
20
20
1
1
1
1
1
1, 16-1,
2, 20-1
16-12
-If-
16-
"wheel-mod"
13
2-12, 2-16 thru 2-19, 3-5, 3-8
lit-S, 15-5, 15-7
see "TUNE"
2-15
3-U
3-15, 1^-5
organ
oscillator (VCO)
oscillator (OSC) A
oscillator (OSC) B
OTA (VGA)
patch CV
pedal
PCB 1
1000.3.0
1001
1005
1010
PCB 2
1000.3.0
1010
1015.1
2-1
2-1, 2-4, 2-19
2
2
2
4 thru 2-8, 3
4 thru 2-8, 3
9, 7-2
17 thru 3-21, 4-3, 4-12, 7-15
17 thru 3-21, 4-4, 4-12, 7-15
2-7, 2-8
14-10, 15-15
1-5, 3-3, 3-4, 5-1
22-3, 22-8
18-1, 19-9, 20-4, 21
15-4, 17-2
1-5, 3-7, 5-1
15-6, 16-12, 17-3
21-2
-2
24-6
TNI 01 6-1 10/83
PCB3
1000.3.0
1000.3.2
1010
PCB'f
1000.3.0
1010
PCB5
1000.3.0
1000.3.1
1000.3.2
1010
PCB6
1010
PCB7
PCB8
PCB9
1015.0
1015.1
PCB 10
1015.0
PITCH wheel (PBND)
1000.3.0
1000.3.2
1001
1010
poly -mod
poly-mod filter envelope VGA
poly-mod oscillator B VGA
ports
power detect
1000.3.0
1010
power supply
1000
1010
precautions
preset mode
1000.3.0
PROM
programmability
programmer
programming
Prophet description
quantize
RAM, dynamic (DRAM)
1005
1015.0
1015.1
1-1 thru 1-6, 2-8, 2-10, 3-10, 5-2
10-6
15-10, 16-1, 17-^
1-1 thru 1-6, 3-16, 5-'>
17-10
3-23, 4-9, it-lO, 5
8-1, lO-f
S-t, 10-10, 10-11
see "PGB V'
-8
-19, 16-6, 16-13, 17
-12
-12
lif-U, 15-18, 15
15-20, 15-21, 17
15-22, 16-12, 17
19-3, 21-1
19-9, 20-4
18-1, 19-6, 19-7, 21-2
1-6, 2-4 thru 2-7, 2-19, 3-14,
8-2, 8-4, 10-9
22-1, 22-5, 22-4
14-10, 15-16, 16-13
2-8, 2-9, 3-17 thru 3-21, 4-8
4-13
4-13
see "I/O interface"
2-12, 3-11
14-6, 14-11, 15-11, 16-1
see "PGB 5"
see "PGB 6"
1-1
-11
4-10
2-2, 2-7, 2-10, 2-21
"EPROM" or "software"
2
2
3
5
see "digital interface"
2-4
2-8
18-1, 18-2, 19-11
19-5
18-1, 18-2, 19-11
TN1016-1 10/83
24-7
t t
K
RAM, non-volatile (NV)
1000.3.0
1000.3.1
1000.3.2
1000.3.3
1010
RAM, scratchpad (SPAD)
1000.3.0
1010
real time clock (RTC)
1005
1010
record enable
1000.3.0
1000.3.1
1010
reset
1000.3.0
1000.3.2
revision description(s)
1000.1
1000.2
1000.3.0
1000.3.1
1000.3.2
1000.3.3
1005
1010
1015.0
1015.1
1016
revision procedures
ROM
sample/hold
scale mode
scaling (V/OCT)
scan time
schematics
1000.3.0
1000.3.1
1000.3.2
1001
1005
1010
1015.0
1015.1
sequencer interface (mono or poly)
1000.3.0
1000.3.2
1010
2-7, 2-10, 2-12, 2-13, 2-21, 3-11
8-1, 10-2
11-^
13-8
ltt-7, 15-11, 16-1
2-7, 2-10, 2-13 thru 2-17, 2-19, 3-11
l'f-5thru R-7, 15-11
18-1, 18-2
R-5, 11^-6, 15-11
2-12, t^-1, 3-11
8-1
l'A-8, 15-11
2-12
8-2
v (D.2)
v (D.2)
v (D.2)
V (D.2), 8-1
v (D.2), 8-1,
13-1, 23-1
ill, 18-1
8-2
iii, 14-1
iii, 18-1
\
y
lU
iii, 18-1
see "modifications (authorized)"
see "EPROM"
2
2
2
8, 2-1 1^, 2-18
8
-12
8, 2-9, 2-19, 4
see "loop"
3-5 thru 3-23
10-2 thru 10-4
10-5 thru 10-11
22-1
19-7, 19-10 thru 19-13
15-3 thru 15-24
19-4 thru 19-7
19-7, 19-10 thru 19-13
2-20, 3-12,3-13,4-11
8-3, 10-8
14-6 thru 14-8, 15-13,
15-14, 16-14
>
24-8
TN1016-1 10/83
i
'^\?i(,nr,r\,'\.y ,\ -' .'. ■^■■..■..^: *-"^'
■^
serial numbers
1000.1
V (D.2)
1000.2
V (D.2)
1000.3.0
v(D.2), 8-1, U-'*, 1^-1
1000.3.1
11-4, lif-l
1000.3.2
11-5, 12-1, 13-1
1000.3.3
13-1
■
1001
22-1
1005
18-1, 20-'f
1010
14-1, 18-1
1
1015.0
18-1, 20-4
1015.1
18-1
1016.0
20-4
service position
1-1 thru 1-3
service, general
f
1000.3.0
4-1, 4-2
software
see "EPROM"
subtractive synthesis
2-2
switch, bipolar
14-10
switch/keyboard matrix
■
1000.3.0
2-7, 2-15, 3-5, 3-9, 3-13
1001
22-1
1010
14-7, 15-5, 15-8
synthesizer
2-1
tape transfer (1015.0 to 1015.1)
20-6, 20-7
test points
1000.3
TP301 OSC SCALE
3-10, 3-12
TP302 CV OUT
3-10, 3-13
TP303 FILTCV
3-10, 3-13
timer (tune, A-'^'fO)
1000.3.0
2-13,2-19,3-11
1010
14-5, 14-6, 15-11
timbre
2-2
top panel assembly
1000.3.0
1-1 thru 1-3, 1-6
TUNE
see also "timer"
1000.3.0
2-19, 3-12, 3-14, 3-15
1000.3.2
14-10
1010
r
14-10, 15-12
tuning
see "oscillator A," "oscillator B," or
"filter"
UART/USART
1000.3.2
8-2, 8-3, 10-7
1000.3.3
13-8
1005
18-1
1010
14-5, 14-6, 15-11
1015.0
19-4
1015.1
18-1, 19-11
ugly mod
14-1, 16-1
unison
see also "glide"
1000.3.0
2-9, 2-17, 2-19, 2-20, 3-14, 4-5
updates
see "modifications"
TN1016-1 10/83
24-9
1
voltage-current converter
voice assignment
voice volume
volume
voltage control (VC)
wheels
wheel modulation
1000.3.0
1000.3.2
1001
1010
2
2
9
16
see "audio output"
2-1
see "wheel-mod" or "pitch wheel"
1-6, 2-^ thru 2-7, 2-9, 2-15, 2-19, 3-1^*, k-7,
'f-lO, ^-11
8-2,8-4, 10-9, 11-6
22-1, 22-4, 22-5
14-8, 15-15, 16-3, 16-14
24-10
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